mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-25 20:20:55 +07:00
3c263bc7b7
Add bindings document for the Altera Freeze Bridge. A Freeze Bridge is used to gate traffic to/from a region of a FPGA such that that region can be reprogrammed. The Freeze Bridge exist in FPGA fabric that is not currently being reconfigured. Signed-off-by: Alan Tull <atull@opensource.altera.com> Signed-off-by: Matthew Gerlach <mgerlach@opensource.altera.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Rob Herring <robh@kernel.org>
24 lines
800 B
Plaintext
24 lines
800 B
Plaintext
Altera Freeze Bridge Controller Driver
|
|
|
|
The Altera Freeze Bridge Controller manages one or more freeze bridges.
|
|
The controller can freeze/disable the bridges which prevents signal
|
|
changes from passing through the bridge. The controller can also
|
|
unfreeze/enable the bridges which allows traffic to pass through the
|
|
bridge normally.
|
|
|
|
Required properties:
|
|
- compatible : Should contain "altr,freeze-bridge-controller"
|
|
- regs : base address and size for freeze bridge module
|
|
|
|
Optional properties:
|
|
- bridge-enable : 0 if driver should disable bridge at startup
|
|
1 if driver should enable bridge at startup
|
|
Default is to leave bridge in current state.
|
|
|
|
Example:
|
|
freeze-controller@100000450 {
|
|
compatible = "altr,freeze-bridge-controller";
|
|
regs = <0x1000 0x10>;
|
|
bridge-enable = <0>;
|
|
};
|