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e6cbf9984e
The only way for a fixed factor clock to change its rate would be to change its parent rate. Since passing blindly CLK_SET_RATE_PARENT might break a lot of platforms that were relying on the fact that the parent rate wouldn't change, introduce a compatible-based whitelist that will allow clocks to opt-in that flag. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
29 lines
733 B
Plaintext
29 lines
733 B
Plaintext
Binding for simple fixed factor rate clock sources.
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This binding uses the common clock binding[1].
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[1] Documentation/devicetree/bindings/clock/clock-bindings.txt
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Required properties:
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- compatible : shall be "fixed-factor-clock".
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- #clock-cells : from common clock binding; shall be set to 0.
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- clock-div: fixed divider.
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- clock-mult: fixed multiplier.
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- clocks: parent clock.
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Optional properties:
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- clock-output-names : From common clock binding.
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Some clocks that require special treatments are also handled by that
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driver, with the compatibles:
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- allwinner,sun4i-a10-pll3-2x-clk
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Example:
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clock {
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compatible = "fixed-factor-clock";
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clocks = <&parentclk>;
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#clock-cells = <0>;
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clock-div = <2>;
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clock-mult = <1>;
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};
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