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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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e4ac92df27
Add format and argument checking and fix misuses in the dbg macro. Add __printf Use %pR for resource Add #include guard to samsung.h Move static functions from .h to .c Use vscnprintf instead of length unguarded vsprintf Signed-off-by: Joe Perches <joe@perches.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
84 lines
2.0 KiB
C
84 lines
2.0 KiB
C
#ifndef __SAMSUNG_H
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#define __SAMSUNG_H
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/*
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* Driver for Samsung SoC onboard UARTs.
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*
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* Ben Dooks, Copyright (c) 2003-2008 Simtec Electronics
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* http://armlinux.simtec.co.uk/
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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struct s3c24xx_uart_info {
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char *name;
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unsigned int type;
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unsigned int fifosize;
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unsigned long rx_fifomask;
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unsigned long rx_fifoshift;
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unsigned long rx_fifofull;
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unsigned long tx_fifomask;
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unsigned long tx_fifoshift;
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unsigned long tx_fifofull;
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unsigned int def_clk_sel;
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unsigned long num_clks;
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unsigned long clksel_mask;
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unsigned long clksel_shift;
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/* uart port features */
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unsigned int has_divslot:1;
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/* uart controls */
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int (*reset_port)(struct uart_port *, struct s3c2410_uartcfg *);
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};
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struct s3c24xx_serial_drv_data {
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struct s3c24xx_uart_info *info;
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struct s3c2410_uartcfg *def_cfg;
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unsigned int fifosize[CONFIG_SERIAL_SAMSUNG_UARTS];
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};
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struct s3c24xx_uart_port {
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unsigned char rx_claimed;
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unsigned char tx_claimed;
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unsigned int pm_level;
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unsigned long baudclk_rate;
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unsigned int rx_irq;
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unsigned int tx_irq;
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struct s3c24xx_uart_info *info;
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struct clk *clk;
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struct clk *baudclk;
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struct uart_port port;
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struct s3c24xx_serial_drv_data *drv_data;
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/* reference to platform data */
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struct s3c2410_uartcfg *cfg;
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#ifdef CONFIG_CPU_FREQ
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struct notifier_block freq_transition;
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#endif
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};
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/* conversion functions */
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#define s3c24xx_dev_to_port(__dev) dev_get_drvdata(__dev)
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/* register access controls */
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#define portaddr(port, reg) ((port)->membase + (reg))
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#define portaddrl(port, reg) \
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((unsigned long *)(unsigned long)((port)->membase + (reg)))
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#define rd_regb(port, reg) (__raw_readb(portaddr(port, reg)))
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#define rd_regl(port, reg) (__raw_readl(portaddr(port, reg)))
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#define wr_regb(port, reg, val) __raw_writeb(val, portaddr(port, reg))
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#define wr_regl(port, reg, val) __raw_writel(val, portaddr(port, reg))
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#endif
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