mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-24 07:55:57 +07:00
dcbb613fa8
There is no call to platform_get_drvdata() in the driver, so platform_set_drvdata() is unnecessary and can be dropped. The conversion was done automatically with coccinelle using the following semantic patches. The semantic patches and the scripts used to generate this commit log are available at https://github.com/groeck/coccinelle-patches Cc: Florian Fainelli <f.fainelli@gmail.com> Cc: Ray Jui <rjui@broadcom.com> Cc: Scott Branden <sbranden@broadcom.com> Cc: bcm-kernel-feedback-list@broadcom.com Cc: Eric Anholt <eric@anholt.net> Cc: Stefan Wahren <stefan.wahren@i2se.com> Signed-off-by: Guenter Roeck <linux@roeck-us.net> Acked-by: Stefan Wahren <stefan.wahren@i2se.com> Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org>
246 lines
6.4 KiB
C
246 lines
6.4 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Watchdog driver for Broadcom BCM2835
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*
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* "bcm2708_wdog" driver written by Luke Diamand that was obtained from
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* branch "rpi-3.6.y" of git://github.com/raspberrypi/linux.git was used
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* as a hardware reference for the Broadcom BCM2835 watchdog timer.
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*
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* Copyright (C) 2013 Lubomir Rintel <lkundrak@v3.sk>
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*
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*/
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#include <linux/delay.h>
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#include <linux/types.h>
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#include <linux/mfd/bcm2835-pm.h>
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#include <linux/module.h>
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#include <linux/io.h>
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#include <linux/watchdog.h>
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#include <linux/platform_device.h>
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#include <linux/of_address.h>
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#include <linux/of_platform.h>
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#define PM_RSTC 0x1c
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#define PM_RSTS 0x20
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#define PM_WDOG 0x24
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#define PM_PASSWORD 0x5a000000
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#define PM_WDOG_TIME_SET 0x000fffff
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#define PM_RSTC_WRCFG_CLR 0xffffffcf
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#define PM_RSTS_HADWRH_SET 0x00000040
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#define PM_RSTC_WRCFG_SET 0x00000030
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#define PM_RSTC_WRCFG_FULL_RESET 0x00000020
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#define PM_RSTC_RESET 0x00000102
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/*
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* The Raspberry Pi firmware uses the RSTS register to know which partition
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* to boot from. The partition value is spread into bits 0, 2, 4, 6, 8, 10.
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* Partition 63 is a special partition used by the firmware to indicate halt.
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*/
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#define PM_RSTS_RASPBERRYPI_HALT 0x555
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#define SECS_TO_WDOG_TICKS(x) ((x) << 16)
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#define WDOG_TICKS_TO_SECS(x) ((x) >> 16)
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struct bcm2835_wdt {
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void __iomem *base;
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spinlock_t lock;
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};
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static struct bcm2835_wdt *bcm2835_power_off_wdt;
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static unsigned int heartbeat;
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static bool nowayout = WATCHDOG_NOWAYOUT;
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static bool bcm2835_wdt_is_running(struct bcm2835_wdt *wdt)
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{
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uint32_t cur;
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cur = readl(wdt->base + PM_RSTC);
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return !!(cur & PM_RSTC_WRCFG_FULL_RESET);
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}
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static int bcm2835_wdt_start(struct watchdog_device *wdog)
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{
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struct bcm2835_wdt *wdt = watchdog_get_drvdata(wdog);
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uint32_t cur;
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unsigned long flags;
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spin_lock_irqsave(&wdt->lock, flags);
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writel_relaxed(PM_PASSWORD | (SECS_TO_WDOG_TICKS(wdog->timeout) &
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PM_WDOG_TIME_SET), wdt->base + PM_WDOG);
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cur = readl_relaxed(wdt->base + PM_RSTC);
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writel_relaxed(PM_PASSWORD | (cur & PM_RSTC_WRCFG_CLR) |
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PM_RSTC_WRCFG_FULL_RESET, wdt->base + PM_RSTC);
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spin_unlock_irqrestore(&wdt->lock, flags);
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return 0;
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}
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static int bcm2835_wdt_stop(struct watchdog_device *wdog)
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{
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struct bcm2835_wdt *wdt = watchdog_get_drvdata(wdog);
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writel_relaxed(PM_PASSWORD | PM_RSTC_RESET, wdt->base + PM_RSTC);
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return 0;
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}
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static unsigned int bcm2835_wdt_get_timeleft(struct watchdog_device *wdog)
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{
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struct bcm2835_wdt *wdt = watchdog_get_drvdata(wdog);
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uint32_t ret = readl_relaxed(wdt->base + PM_WDOG);
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return WDOG_TICKS_TO_SECS(ret & PM_WDOG_TIME_SET);
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}
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static void __bcm2835_restart(struct bcm2835_wdt *wdt)
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{
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u32 val;
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/* use a timeout of 10 ticks (~150us) */
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writel_relaxed(10 | PM_PASSWORD, wdt->base + PM_WDOG);
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val = readl_relaxed(wdt->base + PM_RSTC);
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val &= PM_RSTC_WRCFG_CLR;
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val |= PM_PASSWORD | PM_RSTC_WRCFG_FULL_RESET;
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writel_relaxed(val, wdt->base + PM_RSTC);
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/* No sleeping, possibly atomic. */
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mdelay(1);
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}
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static int bcm2835_restart(struct watchdog_device *wdog,
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unsigned long action, void *data)
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{
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struct bcm2835_wdt *wdt = watchdog_get_drvdata(wdog);
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__bcm2835_restart(wdt);
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return 0;
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}
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static const struct watchdog_ops bcm2835_wdt_ops = {
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.owner = THIS_MODULE,
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.start = bcm2835_wdt_start,
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.stop = bcm2835_wdt_stop,
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.get_timeleft = bcm2835_wdt_get_timeleft,
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.restart = bcm2835_restart,
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};
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static const struct watchdog_info bcm2835_wdt_info = {
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.options = WDIOF_SETTIMEOUT | WDIOF_MAGICCLOSE |
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WDIOF_KEEPALIVEPING,
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.identity = "Broadcom BCM2835 Watchdog timer",
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};
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static struct watchdog_device bcm2835_wdt_wdd = {
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.info = &bcm2835_wdt_info,
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.ops = &bcm2835_wdt_ops,
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.min_timeout = 1,
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.max_timeout = WDOG_TICKS_TO_SECS(PM_WDOG_TIME_SET),
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.timeout = WDOG_TICKS_TO_SECS(PM_WDOG_TIME_SET),
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};
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/*
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* We can't really power off, but if we do the normal reset scheme, and
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* indicate to bootcode.bin not to reboot, then most of the chip will be
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* powered off.
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*/
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static void bcm2835_power_off(void)
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{
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struct bcm2835_wdt *wdt = bcm2835_power_off_wdt;
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u32 val;
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/*
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* We set the watchdog hard reset bit here to distinguish this reset
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* from the normal (full) reset. bootcode.bin will not reboot after a
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* hard reset.
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*/
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val = readl_relaxed(wdt->base + PM_RSTS);
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val |= PM_PASSWORD | PM_RSTS_RASPBERRYPI_HALT;
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writel_relaxed(val, wdt->base + PM_RSTS);
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/* Continue with normal reset mechanism */
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__bcm2835_restart(wdt);
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}
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static int bcm2835_wdt_probe(struct platform_device *pdev)
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{
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struct bcm2835_pm *pm = dev_get_drvdata(pdev->dev.parent);
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struct device *dev = &pdev->dev;
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struct bcm2835_wdt *wdt;
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int err;
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wdt = devm_kzalloc(dev, sizeof(struct bcm2835_wdt), GFP_KERNEL);
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if (!wdt)
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return -ENOMEM;
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spin_lock_init(&wdt->lock);
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wdt->base = pm->base;
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watchdog_set_drvdata(&bcm2835_wdt_wdd, wdt);
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watchdog_init_timeout(&bcm2835_wdt_wdd, heartbeat, dev);
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watchdog_set_nowayout(&bcm2835_wdt_wdd, nowayout);
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bcm2835_wdt_wdd.parent = dev;
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if (bcm2835_wdt_is_running(wdt)) {
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/*
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* The currently active timeout value (set by the
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* bootloader) may be different from the module
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* heartbeat parameter or the value in device
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* tree. But we just need to set WDOG_HW_RUNNING,
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* because then the framework will "immediately" ping
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* the device, updating the timeout.
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*/
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set_bit(WDOG_HW_RUNNING, &bcm2835_wdt_wdd.status);
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}
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watchdog_set_restart_priority(&bcm2835_wdt_wdd, 128);
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watchdog_stop_on_reboot(&bcm2835_wdt_wdd);
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err = devm_watchdog_register_device(dev, &bcm2835_wdt_wdd);
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if (err) {
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dev_err(dev, "Failed to register watchdog device");
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return err;
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}
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if (pm_power_off == NULL) {
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pm_power_off = bcm2835_power_off;
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bcm2835_power_off_wdt = wdt;
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}
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dev_info(dev, "Broadcom BCM2835 watchdog timer");
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return 0;
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}
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static int bcm2835_wdt_remove(struct platform_device *pdev)
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{
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if (pm_power_off == bcm2835_power_off)
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pm_power_off = NULL;
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return 0;
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}
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static struct platform_driver bcm2835_wdt_driver = {
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.probe = bcm2835_wdt_probe,
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.remove = bcm2835_wdt_remove,
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.driver = {
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.name = "bcm2835-wdt",
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},
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};
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module_platform_driver(bcm2835_wdt_driver);
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module_param(heartbeat, uint, 0);
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MODULE_PARM_DESC(heartbeat, "Initial watchdog heartbeat in seconds");
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module_param(nowayout, bool, 0);
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MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
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__MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
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MODULE_AUTHOR("Lubomir Rintel <lkundrak@v3.sk>");
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MODULE_DESCRIPTION("Driver for Broadcom BCM2835 watchdog timer");
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MODULE_LICENSE("GPL");
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