mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-28 05:08:09 +07:00
79150ac9f3
Cleanup blank lines, remove wrong links to http://www.gnu.org/copyleft/gpl.html (the driver is licensed under the terms of GPLv2, but the link points to a copy of the GPLv3), and fix the filename reference in ddbridge-i2c.h. [mchehab@kernel.org: removed whitespace changes at the licensing text, as we didn't get any acks from the authors with regards to changing the text] Cc: Ralph Metzler <rjkm@metzlerbros.de> Cc: Manfred Voelkel <mvoelkel@DigitalDevices.de> Signed-off-by: Daniel Scheller <d.scheller@gmx.net> Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
323 lines
7.9 KiB
C
323 lines
7.9 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* ddbridge.c: Digital Devices PCIe bridge driver
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*
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* Copyright (C) 2010-2017 Digital Devices GmbH
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* Ralph Metzler <rjkm@metzlerbros.de>
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* Marcus Metzler <mocm@metzlerbros.de>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* version 2 only, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/delay.h>
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#include <linux/slab.h>
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#include <linux/poll.h>
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#include <linux/io.h>
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#include <linux/pci.h>
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#include <linux/pci_ids.h>
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#include <linux/timer.h>
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#include <linux/i2c.h>
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#include <linux/swab.h>
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#include <linux/vmalloc.h>
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#include "ddbridge.h"
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#include "ddbridge-i2c.h"
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#include "ddbridge-regs.h"
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#include "ddbridge-hw.h"
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#include "ddbridge-io.h"
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/****************************************************************************/
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/* module parameters */
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#ifdef CONFIG_PCI_MSI
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#ifdef CONFIG_DVB_DDBRIDGE_MSIENABLE
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static int msi = 1;
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#else
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static int msi;
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#endif
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module_param(msi, int, 0444);
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#ifdef CONFIG_DVB_DDBRIDGE_MSIENABLE
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MODULE_PARM_DESC(msi, "Control MSI interrupts: 0-disable, 1-enable (default)");
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#else
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MODULE_PARM_DESC(msi, "Control MSI interrupts: 0-disable (default), 1-enable");
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#endif
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#endif
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/****************************************************************************/
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/****************************************************************************/
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/****************************************************************************/
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static void ddb_irq_disable(struct ddb *dev)
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{
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ddbwritel(dev, 0, INTERRUPT_ENABLE);
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ddbwritel(dev, 0, MSI1_ENABLE);
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}
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static void ddb_msi_exit(struct ddb *dev)
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{
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#ifdef CONFIG_PCI_MSI
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if (dev->msi)
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pci_free_irq_vectors(dev->pdev);
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#endif
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}
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static void ddb_irq_exit(struct ddb *dev)
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{
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ddb_irq_disable(dev);
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if (dev->msi == 2)
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free_irq(pci_irq_vector(dev->pdev, 1), dev);
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free_irq(pci_irq_vector(dev->pdev, 0), dev);
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}
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static void ddb_remove(struct pci_dev *pdev)
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{
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struct ddb *dev = (struct ddb *)pci_get_drvdata(pdev);
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ddb_device_destroy(dev);
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ddb_ports_detach(dev);
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ddb_i2c_release(dev);
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ddb_irq_exit(dev);
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ddb_msi_exit(dev);
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ddb_ports_release(dev);
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ddb_buffers_free(dev);
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ddb_unmap(dev);
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pci_set_drvdata(pdev, NULL);
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pci_disable_device(pdev);
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}
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#ifdef CONFIG_PCI_MSI
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static void ddb_irq_msi(struct ddb *dev, int nr)
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{
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int stat;
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if (msi && pci_msi_enabled()) {
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stat = pci_alloc_irq_vectors(dev->pdev, 1, nr,
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PCI_IRQ_MSI | PCI_IRQ_MSIX);
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if (stat >= 1) {
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dev->msi = stat;
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dev_info(dev->dev, "using %d MSI interrupt(s)\n",
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dev->msi);
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} else {
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dev_info(dev->dev, "MSI not available.\n");
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}
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}
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}
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#endif
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static int ddb_irq_init(struct ddb *dev)
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{
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int stat;
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int irq_flag = IRQF_SHARED;
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ddbwritel(dev, 0x00000000, INTERRUPT_ENABLE);
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ddbwritel(dev, 0x00000000, MSI1_ENABLE);
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ddbwritel(dev, 0x00000000, MSI2_ENABLE);
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ddbwritel(dev, 0x00000000, MSI3_ENABLE);
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ddbwritel(dev, 0x00000000, MSI4_ENABLE);
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ddbwritel(dev, 0x00000000, MSI5_ENABLE);
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ddbwritel(dev, 0x00000000, MSI6_ENABLE);
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ddbwritel(dev, 0x00000000, MSI7_ENABLE);
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#ifdef CONFIG_PCI_MSI
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ddb_irq_msi(dev, 2);
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if (dev->msi)
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irq_flag = 0;
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if (dev->msi == 2) {
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stat = request_irq(pci_irq_vector(dev->pdev, 0),
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ddb_irq_handler0, irq_flag, "ddbridge",
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(void *)dev);
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if (stat < 0)
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return stat;
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stat = request_irq(pci_irq_vector(dev->pdev, 1),
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ddb_irq_handler1, irq_flag, "ddbridge",
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(void *)dev);
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if (stat < 0) {
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free_irq(pci_irq_vector(dev->pdev, 0), dev);
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return stat;
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}
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} else
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#endif
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{
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stat = request_irq(pci_irq_vector(dev->pdev, 0),
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ddb_irq_handler, irq_flag, "ddbridge",
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(void *)dev);
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if (stat < 0)
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return stat;
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}
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if (dev->msi == 2) {
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ddbwritel(dev, 0x0fffff00, INTERRUPT_ENABLE);
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ddbwritel(dev, 0x0000000f, MSI1_ENABLE);
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} else {
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ddbwritel(dev, 0x0fffff0f, INTERRUPT_ENABLE);
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ddbwritel(dev, 0x00000000, MSI1_ENABLE);
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}
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return stat;
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}
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static int ddb_probe(struct pci_dev *pdev,
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const struct pci_device_id *id)
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{
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struct ddb *dev;
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int stat = 0;
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if (pci_enable_device(pdev) < 0)
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return -ENODEV;
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pci_set_master(pdev);
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if (pci_set_dma_mask(pdev, DMA_BIT_MASK(64)))
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if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)))
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return -ENODEV;
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dev = vzalloc(sizeof(*dev));
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if (!dev)
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return -ENOMEM;
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mutex_init(&dev->mutex);
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dev->has_dma = 1;
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dev->pdev = pdev;
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dev->dev = &pdev->dev;
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pci_set_drvdata(pdev, dev);
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dev->link[0].ids.vendor = id->vendor;
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dev->link[0].ids.device = id->device;
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dev->link[0].ids.subvendor = id->subvendor;
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dev->link[0].ids.subdevice = pdev->subsystem_device;
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dev->link[0].ids.devid = (id->device << 16) | id->vendor;
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dev->link[0].dev = dev;
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dev->link[0].info = get_ddb_info(id->vendor, id->device,
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id->subvendor, pdev->subsystem_device);
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dev_info(&pdev->dev, "detected %s\n", dev->link[0].info->name);
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dev->regs_len = pci_resource_len(dev->pdev, 0);
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dev->regs = ioremap(pci_resource_start(dev->pdev, 0),
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pci_resource_len(dev->pdev, 0));
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if (!dev->regs) {
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dev_err(&pdev->dev, "not enough memory for register map\n");
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stat = -ENOMEM;
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goto fail;
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}
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if (ddbreadl(dev, 0) == 0xffffffff) {
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dev_err(&pdev->dev, "cannot read registers\n");
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stat = -ENODEV;
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goto fail;
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}
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dev->link[0].ids.hwid = ddbreadl(dev, 0);
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dev->link[0].ids.regmapid = ddbreadl(dev, 4);
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dev_info(&pdev->dev, "HW %08x REGMAP %08x\n",
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dev->link[0].ids.hwid, dev->link[0].ids.regmapid);
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ddbwritel(dev, 0, DMA_BASE_READ);
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ddbwritel(dev, 0, DMA_BASE_WRITE);
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stat = ddb_irq_init(dev);
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if (stat < 0)
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goto fail0;
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if (ddb_init(dev) == 0)
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return 0;
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ddb_irq_exit(dev);
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fail0:
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dev_err(&pdev->dev, "fail0\n");
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ddb_msi_exit(dev);
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fail:
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dev_err(&pdev->dev, "fail\n");
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ddb_unmap(dev);
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pci_set_drvdata(pdev, NULL);
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pci_disable_device(pdev);
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return -1;
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}
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/****************************************************************************/
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/****************************************************************************/
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/****************************************************************************/
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#define DDB_DEVICE_ANY(_device) \
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{ PCI_DEVICE_SUB(DDVID, _device, DDVID, PCI_ANY_ID) }
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static const struct pci_device_id ddb_id_table[] = {
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DDB_DEVICE_ANY(0x0002),
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DDB_DEVICE_ANY(0x0003),
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DDB_DEVICE_ANY(0x0005),
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DDB_DEVICE_ANY(0x0006),
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DDB_DEVICE_ANY(0x0007),
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DDB_DEVICE_ANY(0x0008),
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DDB_DEVICE_ANY(0x0009),
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DDB_DEVICE_ANY(0x0011),
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DDB_DEVICE_ANY(0x0012),
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DDB_DEVICE_ANY(0x0013),
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DDB_DEVICE_ANY(0x0201),
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DDB_DEVICE_ANY(0x0203),
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DDB_DEVICE_ANY(0x0210),
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DDB_DEVICE_ANY(0x0220),
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DDB_DEVICE_ANY(0x0320),
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DDB_DEVICE_ANY(0x0321),
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DDB_DEVICE_ANY(0x0322),
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DDB_DEVICE_ANY(0x0323),
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DDB_DEVICE_ANY(0x0328),
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DDB_DEVICE_ANY(0x0329),
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{0}
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};
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MODULE_DEVICE_TABLE(pci, ddb_id_table);
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static struct pci_driver ddb_pci_driver = {
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.name = "ddbridge",
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.id_table = ddb_id_table,
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.probe = ddb_probe,
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.remove = ddb_remove,
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};
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static __init int module_init_ddbridge(void)
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{
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int stat;
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pr_info("Digital Devices PCIE bridge driver "
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DDBRIDGE_VERSION
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", Copyright (C) 2010-17 Digital Devices GmbH\n");
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stat = ddb_init_ddbridge();
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if (stat < 0)
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return stat;
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stat = pci_register_driver(&ddb_pci_driver);
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if (stat < 0)
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ddb_exit_ddbridge(0, stat);
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return stat;
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}
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static __exit void module_exit_ddbridge(void)
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{
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pci_unregister_driver(&ddb_pci_driver);
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ddb_exit_ddbridge(0, 0);
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}
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module_init(module_init_ddbridge);
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module_exit(module_exit_ddbridge);
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MODULE_DESCRIPTION("Digital Devices PCIe Bridge");
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MODULE_AUTHOR("Ralph and Marcus Metzler, Metzler Brothers Systementwicklung GbR");
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MODULE_LICENSE("GPL v2");
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MODULE_VERSION(DDBRIDGE_VERSION);
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