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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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dc4e0021b0
There are three problems with the current layout of the doublefault
stack and TSS. First, the TSS is only cacheline-aligned, which is
not enough -- if the hardware portion of the TSS (struct x86_hw_tss)
crosses a page boundary, horrible things happen [0]. Second, the
stack and TSS are global, so simultaneous double faults on different
CPUs will cause massive corruption. Third, the whole mechanism
won't work if user CR3 is loaded, resulting in a triple fault [1].
Let the doublefault stack and TSS share a page (which prevents the
TSS from spanning a page boundary), make it percpu, and move it into
cpu_entry_area. Teach the stack dump code about the doublefault
stack.
[0] Real hardware will read past the end of the page onto the next
*physical* page if a task switch happens. Virtual machines may
have any number of bugs, and I would consider it reasonable for
a VM to summarily kill the guest if it tries to task-switch to
a page-spanning TSS.
[1] Real hardware triple faults. At least some VMs seem to hang.
I'm not sure what's going on.
Signed-off-by: Andy Lutomirski <luto@kernel.org>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
92 lines
2.3 KiB
C
92 lines
2.3 KiB
C
// SPDX-License-Identifier: GPL-2.0
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#include <linux/mm.h>
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#include <linux/sched.h>
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#include <linux/sched/debug.h>
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#include <linux/init_task.h>
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#include <linux/fs.h>
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#include <linux/uaccess.h>
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#include <asm/pgtable.h>
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#include <asm/processor.h>
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#include <asm/desc.h>
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#define ptr_ok(x) ((x) > PAGE_OFFSET && (x) < PAGE_OFFSET + MAXMEM)
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static void doublefault_fn(void)
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{
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struct desc_ptr gdt_desc = {0, 0};
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unsigned long gdt, tss;
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BUILD_BUG_ON(sizeof(struct doublefault_stack) != PAGE_SIZE);
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native_store_gdt(&gdt_desc);
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gdt = gdt_desc.address;
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printk(KERN_EMERG "PANIC: double fault, gdt at %08lx [%d bytes]\n", gdt, gdt_desc.size);
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if (ptr_ok(gdt)) {
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gdt += GDT_ENTRY_TSS << 3;
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tss = get_desc_base((struct desc_struct *)gdt);
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printk(KERN_EMERG "double fault, tss at %08lx\n", tss);
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if (ptr_ok(tss)) {
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struct x86_hw_tss *t = (struct x86_hw_tss *)tss;
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printk(KERN_EMERG "eip = %08lx, esp = %08lx\n",
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t->ip, t->sp);
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printk(KERN_EMERG "eax = %08lx, ebx = %08lx, ecx = %08lx, edx = %08lx\n",
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t->ax, t->bx, t->cx, t->dx);
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printk(KERN_EMERG "esi = %08lx, edi = %08lx\n",
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t->si, t->di);
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}
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}
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for (;;)
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cpu_relax();
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}
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DEFINE_PER_CPU_PAGE_ALIGNED(struct doublefault_stack, doublefault_stack) = {
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.tss = {
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/*
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* No sp0 or ss0 -- we never run CPL != 0 with this TSS
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* active. sp is filled in later.
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*/
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.ldt = 0,
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.io_bitmap_base = IO_BITMAP_OFFSET_INVALID,
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.ip = (unsigned long) doublefault_fn,
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/* 0x2 bit is always set */
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.flags = X86_EFLAGS_SF | 0x2,
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.es = __USER_DS,
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.cs = __KERNEL_CS,
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.ss = __KERNEL_DS,
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.ds = __USER_DS,
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.fs = __KERNEL_PERCPU,
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#ifndef CONFIG_X86_32_LAZY_GS
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.gs = __KERNEL_STACK_CANARY,
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#endif
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.__cr3 = __pa_nodebug(swapper_pg_dir),
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},
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};
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void doublefault_init_cpu_tss(void)
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{
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unsigned int cpu = smp_processor_id();
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struct cpu_entry_area *cea = get_cpu_entry_area(cpu);
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/*
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* The linker isn't smart enough to initialize percpu variables that
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* point to other places in percpu space.
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*/
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this_cpu_write(doublefault_stack.tss.sp,
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(unsigned long)&cea->doublefault_stack.stack +
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sizeof(doublefault_stack.stack));
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/* Set up doublefault TSS pointer in the GDT */
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__set_tss_desc(cpu, GDT_ENTRY_DOUBLEFAULT_TSS,
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&get_cpu_entry_area(cpu)->doublefault_stack.tss);
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}
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