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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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8a8b6eb7a8
drivers/clk/ti/clk-814x.c:34:12: warning: symbol 'dm814x_adpll_early_init' was not declared. Should it be static? drivers/clk/ti/clk-814x.c:58:12: warning: symbol 'dm814x_adpll_enable_init_clocks' was not declared. Should it be static? drivers/clk/ti/adpll.c:465 ti_adpll_recalc_rate() warn: should '__readw(d->regs + 20) << 18' be a 64 bit type? drivers/clk/ti/adpll.c:945 ti_adpll_probe() error: we previously assumed 'd->clocks' could be null (see line 921) The last one looks like a real bug because we don't return an error on allocation failure. Cc: Tero Kristo <t-kristo@ti.com> Tested-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
91 lines
2.2 KiB
C
91 lines
2.2 KiB
C
/*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation version 2.
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*/
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#include <linux/kernel.h>
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#include <linux/clk.h>
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#include <linux/clk-provider.h>
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#include <linux/clk/ti.h>
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#include <linux/of_platform.h>
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#include "clock.h"
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static struct ti_dt_clk dm814_clks[] = {
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DT_CLK(NULL, "devosc_ck", "devosc_ck"),
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DT_CLK(NULL, "mpu_ck", "mpu_ck"),
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DT_CLK(NULL, "sysclk4_ck", "sysclk4_ck"),
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DT_CLK(NULL, "sysclk5_ck", "sysclk5_ck"),
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DT_CLK(NULL, "sysclk6_ck", "sysclk6_ck"),
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DT_CLK(NULL, "sysclk8_ck", "sysclk8_ck"),
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DT_CLK(NULL, "sysclk10_ck", "sysclk10_ck"),
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DT_CLK(NULL, "sysclk18_ck", "sysclk18_ck"),
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DT_CLK(NULL, "timer_sys_ck", "devosc_ck"),
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DT_CLK(NULL, "timer1_fck", "timer1_fck"),
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DT_CLK(NULL, "timer2_fck", "timer2_fck"),
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DT_CLK(NULL, "cpsw_125mhz_gclk", "cpsw_125mhz_gclk"),
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DT_CLK(NULL, "cpsw_cpts_rft_clk", "cpsw_cpts_rft_clk"),
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{ .node_name = NULL },
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};
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static bool timer_clocks_initialized;
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static int __init dm814x_adpll_early_init(void)
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{
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struct device_node *np;
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if (!timer_clocks_initialized)
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return -ENODEV;
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np = of_find_node_by_name(NULL, "pllss");
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if (!np) {
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pr_err("Could not find node for plls\n");
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return -ENODEV;
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}
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of_platform_populate(np, NULL, NULL, NULL);
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return 0;
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}
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core_initcall(dm814x_adpll_early_init);
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static const char * const init_clocks[] = {
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"pll040clkout", /* MPU 481c5040.adpll.clkout */
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"pll290clkout", /* DDR 481c5290.adpll.clkout */
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};
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static int __init dm814x_adpll_enable_init_clocks(void)
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{
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int i, err;
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if (!timer_clocks_initialized)
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return -ENODEV;
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for (i = 0; i < ARRAY_SIZE(init_clocks); i++) {
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struct clk *clock;
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clock = clk_get(NULL, init_clocks[i]);
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if (WARN(IS_ERR(clock), "could not find init clock %s\n",
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init_clocks[i]))
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continue;
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err = clk_prepare_enable(clock);
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if (WARN(err, "could not enable init clock %s\n",
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init_clocks[i]))
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continue;
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}
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return 0;
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}
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postcore_initcall(dm814x_adpll_enable_init_clocks);
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int __init dm814x_dt_clk_init(void)
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{
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ti_dt_clocks_register(dm814_clks);
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omap2_clk_disable_autoidle_all();
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omap2_clk_enable_init_clocks(NULL, 0);
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timer_clocks_initialized = true;
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return 0;
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}
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