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dc43f46a9b
Very fast systems may violate the minimum constraints for time the reset line needs to remain low, or communicate with the device too soon after releasing the reset. Fix this by adding some delays in to allow the chip to properly reset, also factor out the reset into a function as it is likely it will be re-used in later additions to the driver. Signed-off-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com> Acked-by: Paul Handrigan <Paul.Handrigan@cirrus.com> Signed-off-by: Mark Brown <broonie@kernel.org> |
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.. | ||
aoa | ||
arm | ||
atmel | ||
core | ||
drivers | ||
firewire | ||
hda | ||
i2c | ||
isa | ||
mips | ||
oss | ||
parisc | ||
pci | ||
pcmcia | ||
ppc | ||
sh | ||
soc | ||
sparc | ||
spi | ||
synth | ||
usb | ||
x86 | ||
ac97_bus.c | ||
Kconfig | ||
last.c | ||
Makefile | ||
sound_core.c |