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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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b51033e06c
In pci_pm_complete() there are checks to decide whether or not to
resume devices that were left in runtime-suspend during the preceding
system-wide transition into a sleep state. They involve checking the
current power state of the device and comparing it with the power
state of it set before the preceding system-wide transition, but the
platform component of the device's power state is not handled
correctly in there.
Namely, on platforms with ACPI, the device power state information
needs to be updated with care, so that the reference counters of
power resources used by the device (if any) are set to ensure that
the refreshed power state of it will be maintained going forward.
To that end, introduce a new ->refresh_state() platform PM callback
for PCI devices, for asking the platform to refresh the device power
state data and ensure that the corresponding power state will be
maintained going forward, make it invoke acpi_device_update_power()
(for devices with ACPI PM) on platforms with ACPI and make
pci_pm_complete() use it, through a new pci_refresh_power_state()
wrapper function.
Fixes: a0d2a959d3
(PCI: Avoid unnecessary resume after direct-complete)
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
1013 lines
26 KiB
C
1013 lines
26 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* PCI support in ACPI
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*
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* Copyright (C) 2005 David Shaohua Li <shaohua.li@intel.com>
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* Copyright (C) 2004 Tom Long Nguyen <tom.l.nguyen@intel.com>
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* Copyright (C) 2004 Intel Corp.
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*/
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#include <linux/delay.h>
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#include <linux/init.h>
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#include <linux/irqdomain.h>
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#include <linux/pci.h>
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#include <linux/msi.h>
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#include <linux/pci_hotplug.h>
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#include <linux/module.h>
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#include <linux/pci-aspm.h>
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#include <linux/pci-acpi.h>
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#include <linux/pm_runtime.h>
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#include <linux/pm_qos.h>
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#include "pci.h"
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/*
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* The GUID is defined in the PCI Firmware Specification available here:
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* https://www.pcisig.com/members/downloads/pcifw_r3_1_13Dec10.pdf
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*/
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const guid_t pci_acpi_dsm_guid =
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GUID_INIT(0xe5c937d0, 0x3553, 0x4d7a,
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0x91, 0x17, 0xea, 0x4d, 0x19, 0xc3, 0x43, 0x4d);
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#if defined(CONFIG_PCI_QUIRKS) && defined(CONFIG_ARM64)
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static int acpi_get_rc_addr(struct acpi_device *adev, struct resource *res)
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{
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struct device *dev = &adev->dev;
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struct resource_entry *entry;
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struct list_head list;
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unsigned long flags;
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int ret;
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INIT_LIST_HEAD(&list);
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flags = IORESOURCE_MEM;
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ret = acpi_dev_get_resources(adev, &list,
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acpi_dev_filter_resource_type_cb,
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(void *) flags);
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if (ret < 0) {
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dev_err(dev, "failed to parse _CRS method, error code %d\n",
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ret);
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return ret;
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}
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if (ret == 0) {
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dev_err(dev, "no IO and memory resources present in _CRS\n");
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return -EINVAL;
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}
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entry = list_first_entry(&list, struct resource_entry, node);
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*res = *entry->res;
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acpi_dev_free_resource_list(&list);
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return 0;
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}
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static acpi_status acpi_match_rc(acpi_handle handle, u32 lvl, void *context,
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void **retval)
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{
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u16 *segment = context;
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unsigned long long uid;
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acpi_status status;
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status = acpi_evaluate_integer(handle, "_UID", NULL, &uid);
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if (ACPI_FAILURE(status) || uid != *segment)
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return AE_CTRL_DEPTH;
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*(acpi_handle *)retval = handle;
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return AE_CTRL_TERMINATE;
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}
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int acpi_get_rc_resources(struct device *dev, const char *hid, u16 segment,
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struct resource *res)
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{
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struct acpi_device *adev;
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acpi_status status;
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acpi_handle handle;
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int ret;
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status = acpi_get_devices(hid, acpi_match_rc, &segment, &handle);
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if (ACPI_FAILURE(status)) {
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dev_err(dev, "can't find _HID %s device to locate resources\n",
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hid);
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return -ENODEV;
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}
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ret = acpi_bus_get_device(handle, &adev);
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if (ret)
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return ret;
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ret = acpi_get_rc_addr(adev, res);
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if (ret) {
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dev_err(dev, "can't get resource from %s\n",
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dev_name(&adev->dev));
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return ret;
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}
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return 0;
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}
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#endif
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phys_addr_t acpi_pci_root_get_mcfg_addr(acpi_handle handle)
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{
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acpi_status status = AE_NOT_EXIST;
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unsigned long long mcfg_addr;
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if (handle)
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status = acpi_evaluate_integer(handle, METHOD_NAME__CBA,
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NULL, &mcfg_addr);
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if (ACPI_FAILURE(status))
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return 0;
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return (phys_addr_t)mcfg_addr;
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}
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static acpi_status decode_type0_hpx_record(union acpi_object *record,
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struct hpp_type0 *hpx0)
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{
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int i;
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union acpi_object *fields = record->package.elements;
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u32 revision = fields[1].integer.value;
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switch (revision) {
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case 1:
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if (record->package.count != 6)
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return AE_ERROR;
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for (i = 2; i < 6; i++)
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if (fields[i].type != ACPI_TYPE_INTEGER)
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return AE_ERROR;
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hpx0->revision = revision;
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hpx0->cache_line_size = fields[2].integer.value;
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hpx0->latency_timer = fields[3].integer.value;
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hpx0->enable_serr = fields[4].integer.value;
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hpx0->enable_perr = fields[5].integer.value;
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break;
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default:
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pr_warn("%s: Type 0 Revision %d record not supported\n",
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__func__, revision);
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return AE_ERROR;
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}
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return AE_OK;
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}
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static acpi_status decode_type1_hpx_record(union acpi_object *record,
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struct hpp_type1 *hpx1)
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{
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int i;
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union acpi_object *fields = record->package.elements;
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u32 revision = fields[1].integer.value;
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switch (revision) {
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case 1:
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if (record->package.count != 5)
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return AE_ERROR;
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for (i = 2; i < 5; i++)
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if (fields[i].type != ACPI_TYPE_INTEGER)
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return AE_ERROR;
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hpx1->revision = revision;
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hpx1->max_mem_read = fields[2].integer.value;
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hpx1->avg_max_split = fields[3].integer.value;
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hpx1->tot_max_split = fields[4].integer.value;
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break;
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default:
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pr_warn("%s: Type 1 Revision %d record not supported\n",
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__func__, revision);
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return AE_ERROR;
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}
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return AE_OK;
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}
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static acpi_status decode_type2_hpx_record(union acpi_object *record,
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struct hpp_type2 *hpx2)
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{
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int i;
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union acpi_object *fields = record->package.elements;
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u32 revision = fields[1].integer.value;
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switch (revision) {
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case 1:
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if (record->package.count != 18)
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return AE_ERROR;
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for (i = 2; i < 18; i++)
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if (fields[i].type != ACPI_TYPE_INTEGER)
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return AE_ERROR;
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hpx2->revision = revision;
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hpx2->unc_err_mask_and = fields[2].integer.value;
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hpx2->unc_err_mask_or = fields[3].integer.value;
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hpx2->unc_err_sever_and = fields[4].integer.value;
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hpx2->unc_err_sever_or = fields[5].integer.value;
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hpx2->cor_err_mask_and = fields[6].integer.value;
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hpx2->cor_err_mask_or = fields[7].integer.value;
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hpx2->adv_err_cap_and = fields[8].integer.value;
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hpx2->adv_err_cap_or = fields[9].integer.value;
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hpx2->pci_exp_devctl_and = fields[10].integer.value;
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hpx2->pci_exp_devctl_or = fields[11].integer.value;
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hpx2->pci_exp_lnkctl_and = fields[12].integer.value;
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hpx2->pci_exp_lnkctl_or = fields[13].integer.value;
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hpx2->sec_unc_err_sever_and = fields[14].integer.value;
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hpx2->sec_unc_err_sever_or = fields[15].integer.value;
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hpx2->sec_unc_err_mask_and = fields[16].integer.value;
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hpx2->sec_unc_err_mask_or = fields[17].integer.value;
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break;
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default:
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pr_warn("%s: Type 2 Revision %d record not supported\n",
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__func__, revision);
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return AE_ERROR;
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}
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return AE_OK;
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}
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static void parse_hpx3_register(struct hpx_type3 *hpx3_reg,
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union acpi_object *reg_fields)
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{
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hpx3_reg->device_type = reg_fields[0].integer.value;
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hpx3_reg->function_type = reg_fields[1].integer.value;
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hpx3_reg->config_space_location = reg_fields[2].integer.value;
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hpx3_reg->pci_exp_cap_id = reg_fields[3].integer.value;
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hpx3_reg->pci_exp_cap_ver = reg_fields[4].integer.value;
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hpx3_reg->pci_exp_vendor_id = reg_fields[5].integer.value;
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hpx3_reg->dvsec_id = reg_fields[6].integer.value;
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hpx3_reg->dvsec_rev = reg_fields[7].integer.value;
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hpx3_reg->match_offset = reg_fields[8].integer.value;
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hpx3_reg->match_mask_and = reg_fields[9].integer.value;
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hpx3_reg->match_value = reg_fields[10].integer.value;
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hpx3_reg->reg_offset = reg_fields[11].integer.value;
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hpx3_reg->reg_mask_and = reg_fields[12].integer.value;
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hpx3_reg->reg_mask_or = reg_fields[13].integer.value;
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}
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static acpi_status program_type3_hpx_record(struct pci_dev *dev,
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union acpi_object *record,
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const struct hotplug_program_ops *hp_ops)
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{
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union acpi_object *fields = record->package.elements;
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u32 desc_count, expected_length, revision;
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union acpi_object *reg_fields;
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struct hpx_type3 hpx3;
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int i;
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revision = fields[1].integer.value;
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switch (revision) {
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case 1:
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desc_count = fields[2].integer.value;
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expected_length = 3 + desc_count * 14;
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if (record->package.count != expected_length)
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return AE_ERROR;
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for (i = 2; i < expected_length; i++)
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if (fields[i].type != ACPI_TYPE_INTEGER)
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return AE_ERROR;
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for (i = 0; i < desc_count; i++) {
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reg_fields = fields + 3 + i * 14;
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parse_hpx3_register(&hpx3, reg_fields);
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hp_ops->program_type3(dev, &hpx3);
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}
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break;
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default:
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printk(KERN_WARNING
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"%s: Type 3 Revision %d record not supported\n",
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__func__, revision);
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return AE_ERROR;
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}
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return AE_OK;
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}
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static acpi_status acpi_run_hpx(struct pci_dev *dev, acpi_handle handle,
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const struct hotplug_program_ops *hp_ops)
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{
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acpi_status status;
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struct acpi_buffer buffer = {ACPI_ALLOCATE_BUFFER, NULL};
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union acpi_object *package, *record, *fields;
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struct hpp_type0 hpx0;
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struct hpp_type1 hpx1;
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struct hpp_type2 hpx2;
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u32 type;
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int i;
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status = acpi_evaluate_object(handle, "_HPX", NULL, &buffer);
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if (ACPI_FAILURE(status))
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return status;
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package = (union acpi_object *)buffer.pointer;
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if (package->type != ACPI_TYPE_PACKAGE) {
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status = AE_ERROR;
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goto exit;
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}
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for (i = 0; i < package->package.count; i++) {
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record = &package->package.elements[i];
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if (record->type != ACPI_TYPE_PACKAGE) {
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status = AE_ERROR;
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goto exit;
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}
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fields = record->package.elements;
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if (fields[0].type != ACPI_TYPE_INTEGER ||
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fields[1].type != ACPI_TYPE_INTEGER) {
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status = AE_ERROR;
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goto exit;
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}
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type = fields[0].integer.value;
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switch (type) {
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case 0:
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memset(&hpx0, 0, sizeof(hpx0));
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status = decode_type0_hpx_record(record, &hpx0);
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if (ACPI_FAILURE(status))
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goto exit;
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hp_ops->program_type0(dev, &hpx0);
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break;
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case 1:
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memset(&hpx1, 0, sizeof(hpx1));
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status = decode_type1_hpx_record(record, &hpx1);
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if (ACPI_FAILURE(status))
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goto exit;
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hp_ops->program_type1(dev, &hpx1);
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break;
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case 2:
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memset(&hpx2, 0, sizeof(hpx2));
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status = decode_type2_hpx_record(record, &hpx2);
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if (ACPI_FAILURE(status))
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goto exit;
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hp_ops->program_type2(dev, &hpx2);
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break;
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case 3:
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status = program_type3_hpx_record(dev, record, hp_ops);
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if (ACPI_FAILURE(status))
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goto exit;
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break;
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default:
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pr_err("%s: Type %d record not supported\n",
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__func__, type);
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status = AE_ERROR;
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goto exit;
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}
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}
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exit:
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kfree(buffer.pointer);
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return status;
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}
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static acpi_status acpi_run_hpp(struct pci_dev *dev, acpi_handle handle,
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const struct hotplug_program_ops *hp_ops)
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{
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acpi_status status;
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struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
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union acpi_object *package, *fields;
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struct hpp_type0 hpp0;
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int i;
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memset(&hpp0, 0, sizeof(hpp0));
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status = acpi_evaluate_object(handle, "_HPP", NULL, &buffer);
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if (ACPI_FAILURE(status))
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return status;
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package = (union acpi_object *) buffer.pointer;
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if (package->type != ACPI_TYPE_PACKAGE ||
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package->package.count != 4) {
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status = AE_ERROR;
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goto exit;
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}
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fields = package->package.elements;
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for (i = 0; i < 4; i++) {
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if (fields[i].type != ACPI_TYPE_INTEGER) {
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status = AE_ERROR;
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goto exit;
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}
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}
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hpp0.revision = 1;
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hpp0.cache_line_size = fields[0].integer.value;
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hpp0.latency_timer = fields[1].integer.value;
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hpp0.enable_serr = fields[2].integer.value;
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hpp0.enable_perr = fields[3].integer.value;
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hp_ops->program_type0(dev, &hpp0);
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exit:
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kfree(buffer.pointer);
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return status;
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}
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|
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/* pci_get_hp_params
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*
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* @dev - the pci_dev for which we want parameters
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* @hpp - allocated by the caller
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*/
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int pci_acpi_program_hp_params(struct pci_dev *dev,
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const struct hotplug_program_ops *hp_ops)
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{
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acpi_status status;
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acpi_handle handle, phandle;
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struct pci_bus *pbus;
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|
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if (acpi_pci_disabled)
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return -ENODEV;
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handle = NULL;
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for (pbus = dev->bus; pbus; pbus = pbus->parent) {
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handle = acpi_pci_get_bridge_handle(pbus);
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if (handle)
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break;
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}
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|
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/*
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* _HPP settings apply to all child buses, until another _HPP is
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* encountered. If we don't find an _HPP for the input pci dev,
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* look for it in the parent device scope since that would apply to
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* this pci dev.
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*/
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while (handle) {
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status = acpi_run_hpx(dev, handle, hp_ops);
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if (ACPI_SUCCESS(status))
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return 0;
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status = acpi_run_hpp(dev, handle, hp_ops);
|
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if (ACPI_SUCCESS(status))
|
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return 0;
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if (acpi_is_root_bridge(handle))
|
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break;
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status = acpi_get_parent(handle, &phandle);
|
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if (ACPI_FAILURE(status))
|
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break;
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handle = phandle;
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}
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return -ENODEV;
|
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}
|
|
|
|
/**
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|
* pciehp_is_native - Check whether a hotplug port is handled by the OS
|
|
* @bridge: Hotplug port to check
|
|
*
|
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* Returns true if the given @bridge is handled by the native PCIe hotplug
|
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* driver.
|
|
*/
|
|
bool pciehp_is_native(struct pci_dev *bridge)
|
|
{
|
|
const struct pci_host_bridge *host;
|
|
u32 slot_cap;
|
|
|
|
if (!IS_ENABLED(CONFIG_HOTPLUG_PCI_PCIE))
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|
return false;
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|
|
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pcie_capability_read_dword(bridge, PCI_EXP_SLTCAP, &slot_cap);
|
|
if (!(slot_cap & PCI_EXP_SLTCAP_HPC))
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return false;
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|
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if (pcie_ports_native)
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return true;
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|
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host = pci_find_host_bridge(bridge->bus);
|
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return host->native_pcie_hotplug;
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}
|
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|
|
/**
|
|
* shpchp_is_native - Check whether a hotplug port is handled by the OS
|
|
* @bridge: Hotplug port to check
|
|
*
|
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* Returns true if the given @bridge is handled by the native SHPC hotplug
|
|
* driver.
|
|
*/
|
|
bool shpchp_is_native(struct pci_dev *bridge)
|
|
{
|
|
return bridge->shpc_managed;
|
|
}
|
|
|
|
/**
|
|
* pci_acpi_wake_bus - Root bus wakeup notification fork function.
|
|
* @context: Device wakeup context.
|
|
*/
|
|
static void pci_acpi_wake_bus(struct acpi_device_wakeup_context *context)
|
|
{
|
|
struct acpi_device *adev;
|
|
struct acpi_pci_root *root;
|
|
|
|
adev = container_of(context, struct acpi_device, wakeup.context);
|
|
root = acpi_driver_data(adev);
|
|
pci_pme_wakeup_bus(root->bus);
|
|
}
|
|
|
|
/**
|
|
* pci_acpi_wake_dev - PCI device wakeup notification work function.
|
|
* @context: Device wakeup context.
|
|
*/
|
|
static void pci_acpi_wake_dev(struct acpi_device_wakeup_context *context)
|
|
{
|
|
struct pci_dev *pci_dev;
|
|
|
|
pci_dev = to_pci_dev(context->dev);
|
|
|
|
if (pci_dev->pme_poll)
|
|
pci_dev->pme_poll = false;
|
|
|
|
if (pci_dev->current_state == PCI_D3cold) {
|
|
pci_wakeup_event(pci_dev);
|
|
pm_request_resume(&pci_dev->dev);
|
|
return;
|
|
}
|
|
|
|
/* Clear PME Status if set. */
|
|
if (pci_dev->pme_support)
|
|
pci_check_pme_status(pci_dev);
|
|
|
|
pci_wakeup_event(pci_dev);
|
|
pm_request_resume(&pci_dev->dev);
|
|
|
|
pci_pme_wakeup_bus(pci_dev->subordinate);
|
|
}
|
|
|
|
/**
|
|
* pci_acpi_add_bus_pm_notifier - Register PM notifier for root PCI bus.
|
|
* @dev: PCI root bridge ACPI device.
|
|
*/
|
|
acpi_status pci_acpi_add_bus_pm_notifier(struct acpi_device *dev)
|
|
{
|
|
return acpi_add_pm_notifier(dev, NULL, pci_acpi_wake_bus);
|
|
}
|
|
|
|
/**
|
|
* pci_acpi_add_pm_notifier - Register PM notifier for given PCI device.
|
|
* @dev: ACPI device to add the notifier for.
|
|
* @pci_dev: PCI device to check for the PME status if an event is signaled.
|
|
*/
|
|
acpi_status pci_acpi_add_pm_notifier(struct acpi_device *dev,
|
|
struct pci_dev *pci_dev)
|
|
{
|
|
return acpi_add_pm_notifier(dev, &pci_dev->dev, pci_acpi_wake_dev);
|
|
}
|
|
|
|
/*
|
|
* _SxD returns the D-state with the highest power
|
|
* (lowest D-state number) supported in the S-state "x".
|
|
*
|
|
* If the devices does not have a _PRW
|
|
* (Power Resources for Wake) supporting system wakeup from "x"
|
|
* then the OS is free to choose a lower power (higher number
|
|
* D-state) than the return value from _SxD.
|
|
*
|
|
* But if _PRW is enabled at S-state "x", the OS
|
|
* must not choose a power lower than _SxD --
|
|
* unless the device has an _SxW method specifying
|
|
* the lowest power (highest D-state number) the device
|
|
* may enter while still able to wake the system.
|
|
*
|
|
* ie. depending on global OS policy:
|
|
*
|
|
* if (_PRW at S-state x)
|
|
* choose from highest power _SxD to lowest power _SxW
|
|
* else // no _PRW at S-state x
|
|
* choose highest power _SxD or any lower power
|
|
*/
|
|
|
|
static pci_power_t acpi_pci_choose_state(struct pci_dev *pdev)
|
|
{
|
|
int acpi_state, d_max;
|
|
|
|
if (pdev->no_d3cold)
|
|
d_max = ACPI_STATE_D3_HOT;
|
|
else
|
|
d_max = ACPI_STATE_D3_COLD;
|
|
acpi_state = acpi_pm_device_sleep_state(&pdev->dev, NULL, d_max);
|
|
if (acpi_state < 0)
|
|
return PCI_POWER_ERROR;
|
|
|
|
switch (acpi_state) {
|
|
case ACPI_STATE_D0:
|
|
return PCI_D0;
|
|
case ACPI_STATE_D1:
|
|
return PCI_D1;
|
|
case ACPI_STATE_D2:
|
|
return PCI_D2;
|
|
case ACPI_STATE_D3_HOT:
|
|
return PCI_D3hot;
|
|
case ACPI_STATE_D3_COLD:
|
|
return PCI_D3cold;
|
|
}
|
|
return PCI_POWER_ERROR;
|
|
}
|
|
|
|
static struct acpi_device *acpi_pci_find_companion(struct device *dev);
|
|
|
|
static bool acpi_pci_bridge_d3(struct pci_dev *dev)
|
|
{
|
|
const struct fwnode_handle *fwnode;
|
|
struct acpi_device *adev;
|
|
struct pci_dev *root;
|
|
u8 val;
|
|
|
|
if (!dev->is_hotplug_bridge)
|
|
return false;
|
|
|
|
/*
|
|
* Look for a special _DSD property for the root port and if it
|
|
* is set we know the hierarchy behind it supports D3 just fine.
|
|
*/
|
|
root = pci_find_pcie_root_port(dev);
|
|
if (!root)
|
|
return false;
|
|
|
|
adev = ACPI_COMPANION(&root->dev);
|
|
if (root == dev) {
|
|
/*
|
|
* It is possible that the ACPI companion is not yet bound
|
|
* for the root port so look it up manually here.
|
|
*/
|
|
if (!adev && !pci_dev_is_added(root))
|
|
adev = acpi_pci_find_companion(&root->dev);
|
|
}
|
|
|
|
if (!adev)
|
|
return false;
|
|
|
|
fwnode = acpi_fwnode_handle(adev);
|
|
if (fwnode_property_read_u8(fwnode, "HotPlugSupportInD3", &val))
|
|
return false;
|
|
|
|
return val == 1;
|
|
}
|
|
|
|
static bool acpi_pci_power_manageable(struct pci_dev *dev)
|
|
{
|
|
struct acpi_device *adev = ACPI_COMPANION(&dev->dev);
|
|
return adev ? acpi_device_power_manageable(adev) : false;
|
|
}
|
|
|
|
static int acpi_pci_set_power_state(struct pci_dev *dev, pci_power_t state)
|
|
{
|
|
struct acpi_device *adev = ACPI_COMPANION(&dev->dev);
|
|
static const u8 state_conv[] = {
|
|
[PCI_D0] = ACPI_STATE_D0,
|
|
[PCI_D1] = ACPI_STATE_D1,
|
|
[PCI_D2] = ACPI_STATE_D2,
|
|
[PCI_D3hot] = ACPI_STATE_D3_HOT,
|
|
[PCI_D3cold] = ACPI_STATE_D3_COLD,
|
|
};
|
|
int error = -EINVAL;
|
|
|
|
/* If the ACPI device has _EJ0, ignore the device */
|
|
if (!adev || acpi_has_method(adev->handle, "_EJ0"))
|
|
return -ENODEV;
|
|
|
|
switch (state) {
|
|
case PCI_D3cold:
|
|
if (dev_pm_qos_flags(&dev->dev, PM_QOS_FLAG_NO_POWER_OFF) ==
|
|
PM_QOS_FLAGS_ALL) {
|
|
error = -EBUSY;
|
|
break;
|
|
}
|
|
/* Fall through */
|
|
case PCI_D0:
|
|
case PCI_D1:
|
|
case PCI_D2:
|
|
case PCI_D3hot:
|
|
error = acpi_device_set_power(adev, state_conv[state]);
|
|
}
|
|
|
|
if (!error)
|
|
pci_dbg(dev, "power state changed by ACPI to %s\n",
|
|
acpi_power_state_string(state_conv[state]));
|
|
|
|
return error;
|
|
}
|
|
|
|
static pci_power_t acpi_pci_get_power_state(struct pci_dev *dev)
|
|
{
|
|
struct acpi_device *adev = ACPI_COMPANION(&dev->dev);
|
|
static const pci_power_t state_conv[] = {
|
|
[ACPI_STATE_D0] = PCI_D0,
|
|
[ACPI_STATE_D1] = PCI_D1,
|
|
[ACPI_STATE_D2] = PCI_D2,
|
|
[ACPI_STATE_D3_HOT] = PCI_D3hot,
|
|
[ACPI_STATE_D3_COLD] = PCI_D3cold,
|
|
};
|
|
int state;
|
|
|
|
if (!adev || !acpi_device_power_manageable(adev))
|
|
return PCI_UNKNOWN;
|
|
|
|
state = adev->power.state;
|
|
if (state == ACPI_STATE_UNKNOWN)
|
|
return PCI_UNKNOWN;
|
|
|
|
return state_conv[state];
|
|
}
|
|
|
|
static void acpi_pci_refresh_power_state(struct pci_dev *dev)
|
|
{
|
|
struct acpi_device *adev = ACPI_COMPANION(&dev->dev);
|
|
|
|
if (adev && acpi_device_power_manageable(adev))
|
|
acpi_device_update_power(adev, NULL);
|
|
}
|
|
|
|
static int acpi_pci_propagate_wakeup(struct pci_bus *bus, bool enable)
|
|
{
|
|
while (bus->parent) {
|
|
if (acpi_pm_device_can_wakeup(&bus->self->dev))
|
|
return acpi_pm_set_bridge_wakeup(&bus->self->dev, enable);
|
|
|
|
bus = bus->parent;
|
|
}
|
|
|
|
/* We have reached the root bus. */
|
|
if (bus->bridge) {
|
|
if (acpi_pm_device_can_wakeup(bus->bridge))
|
|
return acpi_pm_set_bridge_wakeup(bus->bridge, enable);
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
static int acpi_pci_wakeup(struct pci_dev *dev, bool enable)
|
|
{
|
|
if (acpi_pm_device_can_wakeup(&dev->dev))
|
|
return acpi_pm_set_device_wakeup(&dev->dev, enable);
|
|
|
|
return acpi_pci_propagate_wakeup(dev->bus, enable);
|
|
}
|
|
|
|
static bool acpi_pci_need_resume(struct pci_dev *dev)
|
|
{
|
|
struct acpi_device *adev = ACPI_COMPANION(&dev->dev);
|
|
|
|
/*
|
|
* In some cases (eg. Samsung 305V4A) leaving a bridge in suspend over
|
|
* system-wide suspend/resume confuses the platform firmware, so avoid
|
|
* doing that. According to Section 16.1.6 of ACPI 6.2, endpoint
|
|
* devices are expected to be in D3 before invoking the S3 entry path
|
|
* from the firmware, so they should not be affected by this issue.
|
|
*/
|
|
if (pci_is_bridge(dev) && acpi_target_system_state() != ACPI_STATE_S0)
|
|
return true;
|
|
|
|
if (!adev || !acpi_device_power_manageable(adev))
|
|
return false;
|
|
|
|
if (adev->wakeup.flags.valid &&
|
|
device_may_wakeup(&dev->dev) != !!adev->wakeup.prepare_count)
|
|
return true;
|
|
|
|
if (acpi_target_system_state() == ACPI_STATE_S0)
|
|
return false;
|
|
|
|
return !!adev->power.flags.dsw_present;
|
|
}
|
|
|
|
static const struct pci_platform_pm_ops acpi_pci_platform_pm = {
|
|
.bridge_d3 = acpi_pci_bridge_d3,
|
|
.is_manageable = acpi_pci_power_manageable,
|
|
.set_state = acpi_pci_set_power_state,
|
|
.get_state = acpi_pci_get_power_state,
|
|
.refresh_state = acpi_pci_refresh_power_state,
|
|
.choose_state = acpi_pci_choose_state,
|
|
.set_wakeup = acpi_pci_wakeup,
|
|
.need_resume = acpi_pci_need_resume,
|
|
};
|
|
|
|
void acpi_pci_add_bus(struct pci_bus *bus)
|
|
{
|
|
union acpi_object *obj;
|
|
struct pci_host_bridge *bridge;
|
|
|
|
if (acpi_pci_disabled || !bus->bridge || !ACPI_HANDLE(bus->bridge))
|
|
return;
|
|
|
|
acpi_pci_slot_enumerate(bus);
|
|
acpiphp_enumerate_slots(bus);
|
|
|
|
/*
|
|
* For a host bridge, check its _DSM for function 8 and if
|
|
* that is available, mark it in pci_host_bridge.
|
|
*/
|
|
if (!pci_is_root_bus(bus))
|
|
return;
|
|
|
|
obj = acpi_evaluate_dsm(ACPI_HANDLE(bus->bridge), &pci_acpi_dsm_guid, 3,
|
|
RESET_DELAY_DSM, NULL);
|
|
if (!obj)
|
|
return;
|
|
|
|
if (obj->type == ACPI_TYPE_INTEGER && obj->integer.value == 1) {
|
|
bridge = pci_find_host_bridge(bus);
|
|
bridge->ignore_reset_delay = 1;
|
|
}
|
|
ACPI_FREE(obj);
|
|
}
|
|
|
|
void acpi_pci_remove_bus(struct pci_bus *bus)
|
|
{
|
|
if (acpi_pci_disabled || !bus->bridge)
|
|
return;
|
|
|
|
acpiphp_remove_slots(bus);
|
|
acpi_pci_slot_remove(bus);
|
|
}
|
|
|
|
/* ACPI bus type */
|
|
static struct acpi_device *acpi_pci_find_companion(struct device *dev)
|
|
{
|
|
struct pci_dev *pci_dev = to_pci_dev(dev);
|
|
bool check_children;
|
|
u64 addr;
|
|
|
|
check_children = pci_is_bridge(pci_dev);
|
|
/* Please ref to ACPI spec for the syntax of _ADR */
|
|
addr = (PCI_SLOT(pci_dev->devfn) << 16) | PCI_FUNC(pci_dev->devfn);
|
|
return acpi_find_child_device(ACPI_COMPANION(dev->parent), addr,
|
|
check_children);
|
|
}
|
|
|
|
/**
|
|
* pci_acpi_optimize_delay - optimize PCI D3 and D3cold delay from ACPI
|
|
* @pdev: the PCI device whose delay is to be updated
|
|
* @handle: ACPI handle of this device
|
|
*
|
|
* Update the d3_delay and d3cold_delay of a PCI device from the ACPI _DSM
|
|
* control method of either the device itself or the PCI host bridge.
|
|
*
|
|
* Function 8, "Reset Delay," applies to the entire hierarchy below a PCI
|
|
* host bridge. If it returns one, the OS may assume that all devices in
|
|
* the hierarchy have already completed power-on reset delays.
|
|
*
|
|
* Function 9, "Device Readiness Durations," applies only to the object
|
|
* where it is located. It returns delay durations required after various
|
|
* events if the device requires less time than the spec requires. Delays
|
|
* from this function take precedence over the Reset Delay function.
|
|
*
|
|
* These _DSM functions are defined by the draft ECN of January 28, 2014,
|
|
* titled "ACPI additions for FW latency optimizations."
|
|
*/
|
|
static void pci_acpi_optimize_delay(struct pci_dev *pdev,
|
|
acpi_handle handle)
|
|
{
|
|
struct pci_host_bridge *bridge = pci_find_host_bridge(pdev->bus);
|
|
int value;
|
|
union acpi_object *obj, *elements;
|
|
|
|
if (bridge->ignore_reset_delay)
|
|
pdev->d3cold_delay = 0;
|
|
|
|
obj = acpi_evaluate_dsm(handle, &pci_acpi_dsm_guid, 3,
|
|
FUNCTION_DELAY_DSM, NULL);
|
|
if (!obj)
|
|
return;
|
|
|
|
if (obj->type == ACPI_TYPE_PACKAGE && obj->package.count == 5) {
|
|
elements = obj->package.elements;
|
|
if (elements[0].type == ACPI_TYPE_INTEGER) {
|
|
value = (int)elements[0].integer.value / 1000;
|
|
if (value < PCI_PM_D3COLD_WAIT)
|
|
pdev->d3cold_delay = value;
|
|
}
|
|
if (elements[3].type == ACPI_TYPE_INTEGER) {
|
|
value = (int)elements[3].integer.value / 1000;
|
|
if (value < PCI_PM_D3_WAIT)
|
|
pdev->d3_delay = value;
|
|
}
|
|
}
|
|
ACPI_FREE(obj);
|
|
}
|
|
|
|
static void pci_acpi_set_untrusted(struct pci_dev *dev)
|
|
{
|
|
u8 val;
|
|
|
|
if (pci_pcie_type(dev) != PCI_EXP_TYPE_ROOT_PORT)
|
|
return;
|
|
if (device_property_read_u8(&dev->dev, "ExternalFacingPort", &val))
|
|
return;
|
|
|
|
/*
|
|
* These root ports expose PCIe (including DMA) outside of the
|
|
* system so make sure we treat them and everything behind as
|
|
* untrusted.
|
|
*/
|
|
if (val)
|
|
dev->untrusted = 1;
|
|
}
|
|
|
|
static void pci_acpi_setup(struct device *dev)
|
|
{
|
|
struct pci_dev *pci_dev = to_pci_dev(dev);
|
|
struct acpi_device *adev = ACPI_COMPANION(dev);
|
|
|
|
if (!adev)
|
|
return;
|
|
|
|
pci_acpi_optimize_delay(pci_dev, adev->handle);
|
|
pci_acpi_set_untrusted(pci_dev);
|
|
|
|
pci_acpi_add_pm_notifier(adev, pci_dev);
|
|
if (!adev->wakeup.flags.valid)
|
|
return;
|
|
|
|
device_set_wakeup_capable(dev, true);
|
|
/*
|
|
* For bridges that can do D3 we enable wake automatically (as
|
|
* we do for the power management itself in that case). The
|
|
* reason is that the bridge may have additional methods such as
|
|
* _DSW that need to be called.
|
|
*/
|
|
if (pci_dev->bridge_d3)
|
|
device_wakeup_enable(dev);
|
|
|
|
acpi_pci_wakeup(pci_dev, false);
|
|
acpi_device_power_add_dependent(adev, dev);
|
|
}
|
|
|
|
static void pci_acpi_cleanup(struct device *dev)
|
|
{
|
|
struct acpi_device *adev = ACPI_COMPANION(dev);
|
|
struct pci_dev *pci_dev = to_pci_dev(dev);
|
|
|
|
if (!adev)
|
|
return;
|
|
|
|
pci_acpi_remove_pm_notifier(adev);
|
|
if (adev->wakeup.flags.valid) {
|
|
acpi_device_power_remove_dependent(adev, dev);
|
|
if (pci_dev->bridge_d3)
|
|
device_wakeup_disable(dev);
|
|
|
|
device_set_wakeup_capable(dev, false);
|
|
}
|
|
}
|
|
|
|
static bool pci_acpi_bus_match(struct device *dev)
|
|
{
|
|
return dev_is_pci(dev);
|
|
}
|
|
|
|
static struct acpi_bus_type acpi_pci_bus = {
|
|
.name = "PCI",
|
|
.match = pci_acpi_bus_match,
|
|
.find_companion = acpi_pci_find_companion,
|
|
.setup = pci_acpi_setup,
|
|
.cleanup = pci_acpi_cleanup,
|
|
};
|
|
|
|
|
|
static struct fwnode_handle *(*pci_msi_get_fwnode_cb)(struct device *dev);
|
|
|
|
/**
|
|
* pci_msi_register_fwnode_provider - Register callback to retrieve fwnode
|
|
* @fn: Callback matching a device to a fwnode that identifies a PCI
|
|
* MSI domain.
|
|
*
|
|
* This should be called by irqchip driver, which is the parent of
|
|
* the MSI domain to provide callback interface to query fwnode.
|
|
*/
|
|
void
|
|
pci_msi_register_fwnode_provider(struct fwnode_handle *(*fn)(struct device *))
|
|
{
|
|
pci_msi_get_fwnode_cb = fn;
|
|
}
|
|
|
|
/**
|
|
* pci_host_bridge_acpi_msi_domain - Retrieve MSI domain of a PCI host bridge
|
|
* @bus: The PCI host bridge bus.
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*
|
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* This function uses the callback function registered by
|
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* pci_msi_register_fwnode_provider() to retrieve the irq_domain with
|
|
* type DOMAIN_BUS_PCI_MSI of the specified host bridge bus.
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* This returns NULL on error or when the domain is not found.
|
|
*/
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|
struct irq_domain *pci_host_bridge_acpi_msi_domain(struct pci_bus *bus)
|
|
{
|
|
struct fwnode_handle *fwnode;
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|
|
|
if (!pci_msi_get_fwnode_cb)
|
|
return NULL;
|
|
|
|
fwnode = pci_msi_get_fwnode_cb(&bus->dev);
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|
if (!fwnode)
|
|
return NULL;
|
|
|
|
return irq_find_matching_fwnode(fwnode, DOMAIN_BUS_PCI_MSI);
|
|
}
|
|
|
|
static int __init acpi_pci_init(void)
|
|
{
|
|
int ret;
|
|
|
|
if (acpi_gbl_FADT.boot_flags & ACPI_FADT_NO_MSI) {
|
|
pr_info("ACPI FADT declares the system doesn't support MSI, so disable it\n");
|
|
pci_no_msi();
|
|
}
|
|
|
|
if (acpi_gbl_FADT.boot_flags & ACPI_FADT_NO_ASPM) {
|
|
pr_info("ACPI FADT declares the system doesn't support PCIe ASPM, so disable it\n");
|
|
pcie_no_aspm();
|
|
}
|
|
|
|
ret = register_acpi_bus_type(&acpi_pci_bus);
|
|
if (ret)
|
|
return 0;
|
|
|
|
pci_set_platform_pm(&acpi_pci_platform_pm);
|
|
acpi_pci_slot_init();
|
|
acpiphp_init();
|
|
|
|
return 0;
|
|
}
|
|
arch_initcall(acpi_pci_init);
|