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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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90b6c5c73c
This flag was historically used to indicate that a clk is a "basic" type of clk like a mux, divider, gate, etc. This never turned out to be very useful though because it was hard to cleanly split "basic" clks from other clks in a system. This one flag was a way for type introspection and it just didn't scale. If anything, it was used by the TI clk driver to indicate that a clk_hw wasn't contained in the SoC specific clk structure. We can get rid of this define now that TI is finding those clks a different way. Cc: Tero Kristo <t-kristo@ti.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Paul Burton <paul.burton@mips.com> Cc: James Hogan <jhogan@kernel.org> Cc: <linux-mips@vger.kernel.org> Cc: Thierry Reding <thierry.reding@gmail.com> Cc: Kevin Hilman <khilman@baylibre.com> Cc: <linux-pwm@vger.kernel.org> Cc: <linux-amlogic@lists.infradead.org> Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
239 lines
5.9 KiB
C
239 lines
5.9 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2010-2011 Canonical Ltd <jeremy.kerr@canonical.com>
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* Copyright (C) 2011-2012 Mike Turquette, Linaro Ltd <mturquette@linaro.org>
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*
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* Fixed rate clock implementation
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*/
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#include <linux/clk-provider.h>
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#include <linux/module.h>
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#include <linux/slab.h>
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#include <linux/io.h>
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#include <linux/err.h>
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#include <linux/of.h>
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#include <linux/platform_device.h>
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/*
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* DOC: basic fixed-rate clock that cannot gate
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*
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* Traits of this clock:
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* prepare - clk_(un)prepare only ensures parents are prepared
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* enable - clk_enable only ensures parents are enabled
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* rate - rate is always a fixed value. No clk_set_rate support
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* parent - fixed parent. No clk_set_parent support
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*/
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static unsigned long clk_fixed_rate_recalc_rate(struct clk_hw *hw,
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unsigned long parent_rate)
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{
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return to_clk_fixed_rate(hw)->fixed_rate;
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}
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static unsigned long clk_fixed_rate_recalc_accuracy(struct clk_hw *hw,
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unsigned long parent_accuracy)
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{
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return to_clk_fixed_rate(hw)->fixed_accuracy;
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}
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const struct clk_ops clk_fixed_rate_ops = {
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.recalc_rate = clk_fixed_rate_recalc_rate,
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.recalc_accuracy = clk_fixed_rate_recalc_accuracy,
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};
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EXPORT_SYMBOL_GPL(clk_fixed_rate_ops);
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/**
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* clk_hw_register_fixed_rate_with_accuracy - register fixed-rate clock with
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* the clock framework
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* @dev: device that is registering this clock
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* @name: name of this clock
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* @parent_name: name of clock's parent
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* @flags: framework-specific flags
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* @fixed_rate: non-adjustable clock rate
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* @fixed_accuracy: non-adjustable clock rate
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*/
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struct clk_hw *clk_hw_register_fixed_rate_with_accuracy(struct device *dev,
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const char *name, const char *parent_name, unsigned long flags,
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unsigned long fixed_rate, unsigned long fixed_accuracy)
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{
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struct clk_fixed_rate *fixed;
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struct clk_hw *hw;
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struct clk_init_data init;
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int ret;
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/* allocate fixed-rate clock */
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fixed = kzalloc(sizeof(*fixed), GFP_KERNEL);
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if (!fixed)
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return ERR_PTR(-ENOMEM);
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init.name = name;
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init.ops = &clk_fixed_rate_ops;
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init.flags = flags;
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init.parent_names = (parent_name ? &parent_name: NULL);
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init.num_parents = (parent_name ? 1 : 0);
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/* struct clk_fixed_rate assignments */
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fixed->fixed_rate = fixed_rate;
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fixed->fixed_accuracy = fixed_accuracy;
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fixed->hw.init = &init;
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/* register the clock */
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hw = &fixed->hw;
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ret = clk_hw_register(dev, hw);
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if (ret) {
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kfree(fixed);
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hw = ERR_PTR(ret);
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}
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return hw;
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}
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EXPORT_SYMBOL_GPL(clk_hw_register_fixed_rate_with_accuracy);
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struct clk *clk_register_fixed_rate_with_accuracy(struct device *dev,
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const char *name, const char *parent_name, unsigned long flags,
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unsigned long fixed_rate, unsigned long fixed_accuracy)
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{
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struct clk_hw *hw;
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hw = clk_hw_register_fixed_rate_with_accuracy(dev, name, parent_name,
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flags, fixed_rate, fixed_accuracy);
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if (IS_ERR(hw))
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return ERR_CAST(hw);
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return hw->clk;
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}
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EXPORT_SYMBOL_GPL(clk_register_fixed_rate_with_accuracy);
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/**
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* clk_hw_register_fixed_rate - register fixed-rate clock with the clock
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* framework
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* @dev: device that is registering this clock
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* @name: name of this clock
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* @parent_name: name of clock's parent
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* @flags: framework-specific flags
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* @fixed_rate: non-adjustable clock rate
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*/
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struct clk_hw *clk_hw_register_fixed_rate(struct device *dev, const char *name,
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const char *parent_name, unsigned long flags,
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unsigned long fixed_rate)
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{
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return clk_hw_register_fixed_rate_with_accuracy(dev, name, parent_name,
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flags, fixed_rate, 0);
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}
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EXPORT_SYMBOL_GPL(clk_hw_register_fixed_rate);
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struct clk *clk_register_fixed_rate(struct device *dev, const char *name,
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const char *parent_name, unsigned long flags,
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unsigned long fixed_rate)
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{
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return clk_register_fixed_rate_with_accuracy(dev, name, parent_name,
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flags, fixed_rate, 0);
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}
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EXPORT_SYMBOL_GPL(clk_register_fixed_rate);
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void clk_unregister_fixed_rate(struct clk *clk)
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{
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struct clk_hw *hw;
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hw = __clk_get_hw(clk);
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if (!hw)
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return;
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clk_unregister(clk);
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kfree(to_clk_fixed_rate(hw));
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}
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EXPORT_SYMBOL_GPL(clk_unregister_fixed_rate);
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void clk_hw_unregister_fixed_rate(struct clk_hw *hw)
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{
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struct clk_fixed_rate *fixed;
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fixed = to_clk_fixed_rate(hw);
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clk_hw_unregister(hw);
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kfree(fixed);
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}
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EXPORT_SYMBOL_GPL(clk_hw_unregister_fixed_rate);
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#ifdef CONFIG_OF
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static struct clk *_of_fixed_clk_setup(struct device_node *node)
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{
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struct clk *clk;
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const char *clk_name = node->name;
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u32 rate;
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u32 accuracy = 0;
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int ret;
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if (of_property_read_u32(node, "clock-frequency", &rate))
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return ERR_PTR(-EIO);
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of_property_read_u32(node, "clock-accuracy", &accuracy);
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of_property_read_string(node, "clock-output-names", &clk_name);
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clk = clk_register_fixed_rate_with_accuracy(NULL, clk_name, NULL,
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0, rate, accuracy);
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if (IS_ERR(clk))
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return clk;
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ret = of_clk_add_provider(node, of_clk_src_simple_get, clk);
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if (ret) {
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clk_unregister(clk);
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return ERR_PTR(ret);
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}
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return clk;
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}
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/**
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* of_fixed_clk_setup() - Setup function for simple fixed rate clock
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*/
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void __init of_fixed_clk_setup(struct device_node *node)
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{
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_of_fixed_clk_setup(node);
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}
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CLK_OF_DECLARE(fixed_clk, "fixed-clock", of_fixed_clk_setup);
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static int of_fixed_clk_remove(struct platform_device *pdev)
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{
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struct clk *clk = platform_get_drvdata(pdev);
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of_clk_del_provider(pdev->dev.of_node);
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clk_unregister_fixed_rate(clk);
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return 0;
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}
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static int of_fixed_clk_probe(struct platform_device *pdev)
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{
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struct clk *clk;
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/*
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* This function is not executed when of_fixed_clk_setup
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* succeeded.
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*/
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clk = _of_fixed_clk_setup(pdev->dev.of_node);
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if (IS_ERR(clk))
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return PTR_ERR(clk);
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platform_set_drvdata(pdev, clk);
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return 0;
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}
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static const struct of_device_id of_fixed_clk_ids[] = {
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{ .compatible = "fixed-clock" },
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{ }
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};
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MODULE_DEVICE_TABLE(of, of_fixed_clk_ids);
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static struct platform_driver of_fixed_clk_driver = {
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.driver = {
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.name = "of_fixed_clk",
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.of_match_table = of_fixed_clk_ids,
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},
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.probe = of_fixed_clk_probe,
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.remove = of_fixed_clk_remove,
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};
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builtin_platform_driver(of_fixed_clk_driver);
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#endif
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