mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-28 05:58:45 +07:00
e90dd26456
Make return values more direct, eliminating some gotos and otherwise unneeded conditionals. This also eliminates some local variables. Also a few minor cleanups in affected code so checkpatch won't complain. Signed-off-by: Mark Rustad <mark.d.rustad@intel.com> Tested-by: Phil Schmitt <phillip.j.schmitt@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
1006 lines
27 KiB
C
1006 lines
27 KiB
C
/*******************************************************************************
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Intel 10 Gigabit PCI Express Linux driver
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Copyright(c) 1999 - 2014 Intel Corporation.
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This program is free software; you can redistribute it and/or modify it
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under the terms and conditions of the GNU General Public License,
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version 2, as published by the Free Software Foundation.
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This program is distributed in the hope it will be useful, but WITHOUT
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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more details.
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You should have received a copy of the GNU General Public License along with
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this program; if not, write to the Free Software Foundation, Inc.,
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51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
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The full GNU General Public License is included in this distribution in
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the file called "COPYING".
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Contact Information:
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Linux NICS <linux.nics@intel.com>
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e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
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Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
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*******************************************************************************/
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#include "ixgbe.h"
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#include <linux/if_ether.h>
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#include <linux/gfp.h>
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#include <linux/if_vlan.h>
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#include <scsi/scsi_cmnd.h>
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#include <scsi/scsi_device.h>
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#include <scsi/fc/fc_fs.h>
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#include <scsi/fc/fc_fcoe.h>
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#include <scsi/libfc.h>
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#include <scsi/libfcoe.h>
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/**
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* ixgbe_fcoe_clear_ddp - clear the given ddp context
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* @ddp: ptr to the ixgbe_fcoe_ddp
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*
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* Returns : none
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*
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*/
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static inline void ixgbe_fcoe_clear_ddp(struct ixgbe_fcoe_ddp *ddp)
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{
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ddp->len = 0;
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ddp->err = 1;
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ddp->udl = NULL;
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ddp->udp = 0UL;
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ddp->sgl = NULL;
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ddp->sgc = 0;
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}
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/**
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* ixgbe_fcoe_ddp_put - free the ddp context for a given xid
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* @netdev: the corresponding net_device
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* @xid: the xid that corresponding ddp will be freed
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*
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* This is the implementation of net_device_ops.ndo_fcoe_ddp_done
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* and it is expected to be called by ULD, i.e., FCP layer of libfc
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* to release the corresponding ddp context when the I/O is done.
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*
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* Returns : data length already ddp-ed in bytes
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*/
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int ixgbe_fcoe_ddp_put(struct net_device *netdev, u16 xid)
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{
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int len;
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struct ixgbe_fcoe *fcoe;
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struct ixgbe_adapter *adapter;
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struct ixgbe_fcoe_ddp *ddp;
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u32 fcbuff;
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if (!netdev)
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return 0;
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if (xid >= IXGBE_FCOE_DDP_MAX)
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return 0;
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adapter = netdev_priv(netdev);
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fcoe = &adapter->fcoe;
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ddp = &fcoe->ddp[xid];
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if (!ddp->udl)
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return 0;
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len = ddp->len;
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/* if there an error, force to invalidate ddp context */
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if (ddp->err) {
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spin_lock_bh(&fcoe->lock);
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IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCFLT, 0);
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IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCFLTRW,
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(xid | IXGBE_FCFLTRW_WE));
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IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCBUFF, 0);
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IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCDMARW,
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(xid | IXGBE_FCDMARW_WE));
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/* guaranteed to be invalidated after 100us */
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IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCDMARW,
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(xid | IXGBE_FCDMARW_RE));
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fcbuff = IXGBE_READ_REG(&adapter->hw, IXGBE_FCBUFF);
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spin_unlock_bh(&fcoe->lock);
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if (fcbuff & IXGBE_FCBUFF_VALID)
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udelay(100);
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}
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if (ddp->sgl)
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dma_unmap_sg(&adapter->pdev->dev, ddp->sgl, ddp->sgc,
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DMA_FROM_DEVICE);
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if (ddp->pool) {
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dma_pool_free(ddp->pool, ddp->udl, ddp->udp);
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ddp->pool = NULL;
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}
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ixgbe_fcoe_clear_ddp(ddp);
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return len;
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}
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/**
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* ixgbe_fcoe_ddp_setup - called to set up ddp context
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* @netdev: the corresponding net_device
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* @xid: the exchange id requesting ddp
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* @sgl: the scatter-gather list for this request
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* @sgc: the number of scatter-gather items
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*
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* Returns : 1 for success and 0 for no ddp
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*/
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static int ixgbe_fcoe_ddp_setup(struct net_device *netdev, u16 xid,
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struct scatterlist *sgl, unsigned int sgc,
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int target_mode)
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{
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struct ixgbe_adapter *adapter;
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struct ixgbe_hw *hw;
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struct ixgbe_fcoe *fcoe;
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struct ixgbe_fcoe_ddp *ddp;
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struct ixgbe_fcoe_ddp_pool *ddp_pool;
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struct scatterlist *sg;
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unsigned int i, j, dmacount;
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unsigned int len;
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static const unsigned int bufflen = IXGBE_FCBUFF_MIN;
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unsigned int firstoff = 0;
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unsigned int lastsize;
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unsigned int thisoff = 0;
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unsigned int thislen = 0;
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u32 fcbuff, fcdmarw, fcfltrw, fcrxctl;
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dma_addr_t addr = 0;
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if (!netdev || !sgl)
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return 0;
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adapter = netdev_priv(netdev);
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if (xid >= IXGBE_FCOE_DDP_MAX) {
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e_warn(drv, "xid=0x%x out-of-range\n", xid);
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return 0;
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}
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/* no DDP if we are already down or resetting */
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if (test_bit(__IXGBE_DOWN, &adapter->state) ||
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test_bit(__IXGBE_RESETTING, &adapter->state))
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return 0;
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fcoe = &adapter->fcoe;
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ddp = &fcoe->ddp[xid];
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if (ddp->sgl) {
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e_err(drv, "xid 0x%x w/ non-null sgl=%p nents=%d\n",
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xid, ddp->sgl, ddp->sgc);
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return 0;
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}
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ixgbe_fcoe_clear_ddp(ddp);
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if (!fcoe->ddp_pool) {
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e_warn(drv, "No ddp_pool resources allocated\n");
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return 0;
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}
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ddp_pool = per_cpu_ptr(fcoe->ddp_pool, get_cpu());
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if (!ddp_pool->pool) {
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e_warn(drv, "xid=0x%x no ddp pool for fcoe\n", xid);
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goto out_noddp;
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}
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/* setup dma from scsi command sgl */
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dmacount = dma_map_sg(&adapter->pdev->dev, sgl, sgc, DMA_FROM_DEVICE);
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if (dmacount == 0) {
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e_err(drv, "xid 0x%x DMA map error\n", xid);
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goto out_noddp;
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}
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/* alloc the udl from per cpu ddp pool */
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ddp->udl = dma_pool_alloc(ddp_pool->pool, GFP_ATOMIC, &ddp->udp);
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if (!ddp->udl) {
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e_err(drv, "failed allocated ddp context\n");
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goto out_noddp_unmap;
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}
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ddp->pool = ddp_pool->pool;
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ddp->sgl = sgl;
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ddp->sgc = sgc;
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j = 0;
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for_each_sg(sgl, sg, dmacount, i) {
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addr = sg_dma_address(sg);
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len = sg_dma_len(sg);
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while (len) {
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/* max number of buffers allowed in one DDP context */
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if (j >= IXGBE_BUFFCNT_MAX) {
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ddp_pool->noddp++;
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goto out_noddp_free;
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}
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/* get the offset of length of current buffer */
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thisoff = addr & ((dma_addr_t)bufflen - 1);
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thislen = min((bufflen - thisoff), len);
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/*
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* all but the 1st buffer (j == 0)
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* must be aligned on bufflen
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*/
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if ((j != 0) && (thisoff))
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goto out_noddp_free;
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/*
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* all but the last buffer
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* ((i == (dmacount - 1)) && (thislen == len))
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* must end at bufflen
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*/
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if (((i != (dmacount - 1)) || (thislen != len))
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&& ((thislen + thisoff) != bufflen))
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goto out_noddp_free;
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ddp->udl[j] = (u64)(addr - thisoff);
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/* only the first buffer may have none-zero offset */
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if (j == 0)
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firstoff = thisoff;
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len -= thislen;
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addr += thislen;
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j++;
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}
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}
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/* only the last buffer may have non-full bufflen */
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lastsize = thisoff + thislen;
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/*
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* lastsize can not be buffer len.
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* If it is then adding another buffer with lastsize = 1.
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*/
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if (lastsize == bufflen) {
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if (j >= IXGBE_BUFFCNT_MAX) {
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ddp_pool->noddp_ext_buff++;
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goto out_noddp_free;
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}
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ddp->udl[j] = (u64)(fcoe->extra_ddp_buffer_dma);
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j++;
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lastsize = 1;
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}
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put_cpu();
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fcbuff = (IXGBE_FCBUFF_4KB << IXGBE_FCBUFF_BUFFSIZE_SHIFT);
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fcbuff |= ((j & 0xff) << IXGBE_FCBUFF_BUFFCNT_SHIFT);
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fcbuff |= (firstoff << IXGBE_FCBUFF_OFFSET_SHIFT);
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/* Set WRCONTX bit to allow DDP for target */
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if (target_mode)
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fcbuff |= (IXGBE_FCBUFF_WRCONTX);
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fcbuff |= (IXGBE_FCBUFF_VALID);
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fcdmarw = xid;
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fcdmarw |= IXGBE_FCDMARW_WE;
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fcdmarw |= (lastsize << IXGBE_FCDMARW_LASTSIZE_SHIFT);
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fcfltrw = xid;
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fcfltrw |= IXGBE_FCFLTRW_WE;
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/* program DMA context */
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hw = &adapter->hw;
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spin_lock_bh(&fcoe->lock);
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/* turn on last frame indication for target mode as FCP_RSPtarget is
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* supposed to send FCP_RSP when it is done. */
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if (target_mode && !test_bit(__IXGBE_FCOE_TARGET, &fcoe->mode)) {
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set_bit(__IXGBE_FCOE_TARGET, &fcoe->mode);
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fcrxctl = IXGBE_READ_REG(hw, IXGBE_FCRXCTRL);
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fcrxctl |= IXGBE_FCRXCTRL_LASTSEQH;
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IXGBE_WRITE_REG(hw, IXGBE_FCRXCTRL, fcrxctl);
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}
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IXGBE_WRITE_REG(hw, IXGBE_FCPTRL, ddp->udp & DMA_BIT_MASK(32));
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IXGBE_WRITE_REG(hw, IXGBE_FCPTRH, (u64)ddp->udp >> 32);
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IXGBE_WRITE_REG(hw, IXGBE_FCBUFF, fcbuff);
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IXGBE_WRITE_REG(hw, IXGBE_FCDMARW, fcdmarw);
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/* program filter context */
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IXGBE_WRITE_REG(hw, IXGBE_FCPARAM, 0);
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IXGBE_WRITE_REG(hw, IXGBE_FCFLT, IXGBE_FCFLT_VALID);
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IXGBE_WRITE_REG(hw, IXGBE_FCFLTRW, fcfltrw);
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spin_unlock_bh(&fcoe->lock);
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return 1;
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out_noddp_free:
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dma_pool_free(ddp->pool, ddp->udl, ddp->udp);
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ixgbe_fcoe_clear_ddp(ddp);
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out_noddp_unmap:
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dma_unmap_sg(&adapter->pdev->dev, sgl, sgc, DMA_FROM_DEVICE);
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out_noddp:
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put_cpu();
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return 0;
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}
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/**
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* ixgbe_fcoe_ddp_get - called to set up ddp context in initiator mode
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* @netdev: the corresponding net_device
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* @xid: the exchange id requesting ddp
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* @sgl: the scatter-gather list for this request
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* @sgc: the number of scatter-gather items
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*
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* This is the implementation of net_device_ops.ndo_fcoe_ddp_setup
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* and is expected to be called from ULD, e.g., FCP layer of libfc
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* to set up ddp for the corresponding xid of the given sglist for
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* the corresponding I/O.
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*
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* Returns : 1 for success and 0 for no ddp
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*/
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int ixgbe_fcoe_ddp_get(struct net_device *netdev, u16 xid,
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struct scatterlist *sgl, unsigned int sgc)
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{
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return ixgbe_fcoe_ddp_setup(netdev, xid, sgl, sgc, 0);
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}
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/**
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* ixgbe_fcoe_ddp_target - called to set up ddp context in target mode
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* @netdev: the corresponding net_device
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* @xid: the exchange id requesting ddp
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* @sgl: the scatter-gather list for this request
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* @sgc: the number of scatter-gather items
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*
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* This is the implementation of net_device_ops.ndo_fcoe_ddp_target
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* and is expected to be called from ULD, e.g., FCP layer of libfc
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* to set up ddp for the corresponding xid of the given sglist for
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* the corresponding I/O. The DDP in target mode is a write I/O request
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* from the initiator.
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*
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* Returns : 1 for success and 0 for no ddp
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*/
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int ixgbe_fcoe_ddp_target(struct net_device *netdev, u16 xid,
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struct scatterlist *sgl, unsigned int sgc)
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{
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return ixgbe_fcoe_ddp_setup(netdev, xid, sgl, sgc, 1);
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}
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/**
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* ixgbe_fcoe_ddp - check ddp status and mark it done
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* @adapter: ixgbe adapter
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* @rx_desc: advanced rx descriptor
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* @skb: the skb holding the received data
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*
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* This checks ddp status.
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*
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* Returns : < 0 indicates an error or not a FCiE ddp, 0 indicates
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* not passing the skb to ULD, > 0 indicates is the length of data
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* being ddped.
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*/
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int ixgbe_fcoe_ddp(struct ixgbe_adapter *adapter,
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union ixgbe_adv_rx_desc *rx_desc,
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struct sk_buff *skb)
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{
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int rc = -EINVAL;
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struct ixgbe_fcoe *fcoe;
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struct ixgbe_fcoe_ddp *ddp;
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struct fc_frame_header *fh;
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struct fcoe_crc_eof *crc;
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__le32 fcerr = ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_FCERR);
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__le32 ddp_err;
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u32 fctl;
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u16 xid;
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if (fcerr == cpu_to_le32(IXGBE_FCERR_BADCRC))
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skb->ip_summed = CHECKSUM_NONE;
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else
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skb->ip_summed = CHECKSUM_UNNECESSARY;
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if (eth_hdr(skb)->h_proto == htons(ETH_P_8021Q))
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fh = (struct fc_frame_header *)(skb->data +
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sizeof(struct vlan_hdr) + sizeof(struct fcoe_hdr));
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else
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fh = (struct fc_frame_header *)(skb->data +
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sizeof(struct fcoe_hdr));
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fctl = ntoh24(fh->fh_f_ctl);
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if (fctl & FC_FC_EX_CTX)
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xid = be16_to_cpu(fh->fh_ox_id);
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else
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xid = be16_to_cpu(fh->fh_rx_id);
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if (xid >= IXGBE_FCOE_DDP_MAX)
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return -EINVAL;
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fcoe = &adapter->fcoe;
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ddp = &fcoe->ddp[xid];
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if (!ddp->udl)
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return -EINVAL;
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ddp_err = ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_FCEOFE |
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IXGBE_RXDADV_ERR_FCERR);
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if (ddp_err)
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return -EINVAL;
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switch (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_STAT_FCSTAT)) {
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/* return 0 to bypass going to ULD for DDPed data */
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case cpu_to_le32(IXGBE_RXDADV_STAT_FCSTAT_DDP):
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/* update length of DDPed data */
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ddp->len = le32_to_cpu(rx_desc->wb.lower.hi_dword.rss);
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rc = 0;
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break;
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/* unmap the sg list when FCPRSP is received */
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case cpu_to_le32(IXGBE_RXDADV_STAT_FCSTAT_FCPRSP):
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dma_unmap_sg(&adapter->pdev->dev, ddp->sgl,
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ddp->sgc, DMA_FROM_DEVICE);
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ddp->err = ddp_err;
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ddp->sgl = NULL;
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ddp->sgc = 0;
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/* fall through */
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/* if DDP length is present pass it through to ULD */
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case cpu_to_le32(IXGBE_RXDADV_STAT_FCSTAT_NODDP):
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/* update length of DDPed data */
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ddp->len = le32_to_cpu(rx_desc->wb.lower.hi_dword.rss);
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if (ddp->len)
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rc = ddp->len;
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break;
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/* no match will return as an error */
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case cpu_to_le32(IXGBE_RXDADV_STAT_FCSTAT_NOMTCH):
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default:
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break;
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}
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/* In target mode, check the last data frame of the sequence.
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* For DDP in target mode, data is already DDPed but the header
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* indication of the last data frame ould allow is to tell if we
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* got all the data and the ULP can send FCP_RSP back, as this is
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* not a full fcoe frame, we fill the trailer here so it won't be
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* dropped by the ULP stack.
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*/
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if ((fh->fh_r_ctl == FC_RCTL_DD_SOL_DATA) &&
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(fctl & FC_FC_END_SEQ)) {
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skb_linearize(skb);
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crc = (struct fcoe_crc_eof *)skb_put(skb, sizeof(*crc));
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crc->fcoe_eof = FC_EOF_T;
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}
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|
|
|
return rc;
|
|
}
|
|
|
|
/**
|
|
* ixgbe_fso - ixgbe FCoE Sequence Offload (FSO)
|
|
* @tx_ring: tx desc ring
|
|
* @first: first tx_buffer structure containing skb, tx_flags, and protocol
|
|
* @hdr_len: hdr_len to be returned
|
|
*
|
|
* This sets up large send offload for FCoE
|
|
*
|
|
* Returns : 0 indicates success, < 0 for error
|
|
*/
|
|
int ixgbe_fso(struct ixgbe_ring *tx_ring,
|
|
struct ixgbe_tx_buffer *first,
|
|
u8 *hdr_len)
|
|
{
|
|
struct sk_buff *skb = first->skb;
|
|
struct fc_frame_header *fh;
|
|
u32 vlan_macip_lens;
|
|
u32 fcoe_sof_eof = 0;
|
|
u32 mss_l4len_idx;
|
|
u8 sof, eof;
|
|
|
|
if (skb_is_gso(skb) && (skb_shinfo(skb)->gso_type != SKB_GSO_FCOE)) {
|
|
dev_err(tx_ring->dev, "Wrong gso type %d:expecting SKB_GSO_FCOE\n",
|
|
skb_shinfo(skb)->gso_type);
|
|
return -EINVAL;
|
|
}
|
|
|
|
/* resets the header to point fcoe/fc */
|
|
skb_set_network_header(skb, skb->mac_len);
|
|
skb_set_transport_header(skb, skb->mac_len +
|
|
sizeof(struct fcoe_hdr));
|
|
|
|
/* sets up SOF and ORIS */
|
|
sof = ((struct fcoe_hdr *)skb_network_header(skb))->fcoe_sof;
|
|
switch (sof) {
|
|
case FC_SOF_I2:
|
|
fcoe_sof_eof = IXGBE_ADVTXD_FCOEF_ORIS;
|
|
break;
|
|
case FC_SOF_I3:
|
|
fcoe_sof_eof = IXGBE_ADVTXD_FCOEF_SOF |
|
|
IXGBE_ADVTXD_FCOEF_ORIS;
|
|
break;
|
|
case FC_SOF_N2:
|
|
break;
|
|
case FC_SOF_N3:
|
|
fcoe_sof_eof = IXGBE_ADVTXD_FCOEF_SOF;
|
|
break;
|
|
default:
|
|
dev_warn(tx_ring->dev, "unknown sof = 0x%x\n", sof);
|
|
return -EINVAL;
|
|
}
|
|
|
|
/* the first byte of the last dword is EOF */
|
|
skb_copy_bits(skb, skb->len - 4, &eof, 1);
|
|
/* sets up EOF and ORIE */
|
|
switch (eof) {
|
|
case FC_EOF_N:
|
|
fcoe_sof_eof |= IXGBE_ADVTXD_FCOEF_EOF_N;
|
|
break;
|
|
case FC_EOF_T:
|
|
/* lso needs ORIE */
|
|
if (skb_is_gso(skb))
|
|
fcoe_sof_eof |= IXGBE_ADVTXD_FCOEF_EOF_N |
|
|
IXGBE_ADVTXD_FCOEF_ORIE;
|
|
else
|
|
fcoe_sof_eof |= IXGBE_ADVTXD_FCOEF_EOF_T;
|
|
break;
|
|
case FC_EOF_NI:
|
|
fcoe_sof_eof |= IXGBE_ADVTXD_FCOEF_EOF_NI;
|
|
break;
|
|
case FC_EOF_A:
|
|
fcoe_sof_eof |= IXGBE_ADVTXD_FCOEF_EOF_A;
|
|
break;
|
|
default:
|
|
dev_warn(tx_ring->dev, "unknown eof = 0x%x\n", eof);
|
|
return -EINVAL;
|
|
}
|
|
|
|
/* sets up PARINC indicating data offset */
|
|
fh = (struct fc_frame_header *)skb_transport_header(skb);
|
|
if (fh->fh_f_ctl[2] & FC_FC_REL_OFF)
|
|
fcoe_sof_eof |= IXGBE_ADVTXD_FCOEF_PARINC;
|
|
|
|
/* include trailer in headlen as it is replicated per frame */
|
|
*hdr_len = sizeof(struct fcoe_crc_eof);
|
|
|
|
/* hdr_len includes fc_hdr if FCoE LSO is enabled */
|
|
if (skb_is_gso(skb)) {
|
|
*hdr_len += skb_transport_offset(skb) +
|
|
sizeof(struct fc_frame_header);
|
|
/* update gso_segs and bytecount */
|
|
first->gso_segs = DIV_ROUND_UP(skb->len - *hdr_len,
|
|
skb_shinfo(skb)->gso_size);
|
|
first->bytecount += (first->gso_segs - 1) * *hdr_len;
|
|
first->tx_flags |= IXGBE_TX_FLAGS_TSO;
|
|
}
|
|
|
|
/* set flag indicating FCOE to ixgbe_tx_map call */
|
|
first->tx_flags |= IXGBE_TX_FLAGS_FCOE | IXGBE_TX_FLAGS_CC;
|
|
|
|
/* mss_l4len_id: use 0 for FSO as TSO, no need for L4LEN */
|
|
mss_l4len_idx = skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT;
|
|
|
|
/* vlan_macip_lens: HEADLEN, MACLEN, VLAN tag */
|
|
vlan_macip_lens = skb_transport_offset(skb) +
|
|
sizeof(struct fc_frame_header);
|
|
vlan_macip_lens |= (skb_transport_offset(skb) - 4)
|
|
<< IXGBE_ADVTXD_MACLEN_SHIFT;
|
|
vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
|
|
|
|
/* write context desc */
|
|
ixgbe_tx_ctxtdesc(tx_ring, vlan_macip_lens, fcoe_sof_eof,
|
|
IXGBE_ADVTXT_TUCMD_FCOE, mss_l4len_idx);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static void ixgbe_fcoe_dma_pool_free(struct ixgbe_fcoe *fcoe, unsigned int cpu)
|
|
{
|
|
struct ixgbe_fcoe_ddp_pool *ddp_pool;
|
|
|
|
ddp_pool = per_cpu_ptr(fcoe->ddp_pool, cpu);
|
|
if (ddp_pool->pool)
|
|
dma_pool_destroy(ddp_pool->pool);
|
|
ddp_pool->pool = NULL;
|
|
}
|
|
|
|
static int ixgbe_fcoe_dma_pool_alloc(struct ixgbe_fcoe *fcoe,
|
|
struct device *dev,
|
|
unsigned int cpu)
|
|
{
|
|
struct ixgbe_fcoe_ddp_pool *ddp_pool;
|
|
struct dma_pool *pool;
|
|
char pool_name[32];
|
|
|
|
snprintf(pool_name, 32, "ixgbe_fcoe_ddp_%u", cpu);
|
|
|
|
pool = dma_pool_create(pool_name, dev, IXGBE_FCPTR_MAX,
|
|
IXGBE_FCPTR_ALIGN, PAGE_SIZE);
|
|
if (!pool)
|
|
return -ENOMEM;
|
|
|
|
ddp_pool = per_cpu_ptr(fcoe->ddp_pool, cpu);
|
|
ddp_pool->pool = pool;
|
|
ddp_pool->noddp = 0;
|
|
ddp_pool->noddp_ext_buff = 0;
|
|
|
|
return 0;
|
|
}
|
|
|
|
/**
|
|
* ixgbe_configure_fcoe - configures registers for fcoe at start
|
|
* @adapter: ptr to ixgbe adapter
|
|
*
|
|
* This sets up FCoE related registers
|
|
*
|
|
* Returns : none
|
|
*/
|
|
void ixgbe_configure_fcoe(struct ixgbe_adapter *adapter)
|
|
{
|
|
struct ixgbe_ring_feature *fcoe = &adapter->ring_feature[RING_F_FCOE];
|
|
struct ixgbe_hw *hw = &adapter->hw;
|
|
int i, fcoe_q, fcoe_i;
|
|
u32 etqf;
|
|
|
|
/* Minimal functionality for FCoE requires at least CRC offloads */
|
|
if (!(adapter->netdev->features & NETIF_F_FCOE_CRC))
|
|
return;
|
|
|
|
/* Enable L2 EtherType filter for FCoE, needed for FCoE CRC and DDP */
|
|
etqf = ETH_P_FCOE | IXGBE_ETQF_FCOE | IXGBE_ETQF_FILTER_EN;
|
|
if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
|
|
etqf |= IXGBE_ETQF_POOL_ENABLE;
|
|
etqf |= VMDQ_P(0) << IXGBE_ETQF_POOL_SHIFT;
|
|
}
|
|
IXGBE_WRITE_REG(hw, IXGBE_ETQF(IXGBE_ETQF_FILTER_FCOE), etqf);
|
|
IXGBE_WRITE_REG(hw, IXGBE_ETQS(IXGBE_ETQF_FILTER_FCOE), 0);
|
|
|
|
/* leave registers un-configured if FCoE is disabled */
|
|
if (!(adapter->flags & IXGBE_FLAG_FCOE_ENABLED))
|
|
return;
|
|
|
|
/* Use one or more Rx queues for FCoE by redirection table */
|
|
for (i = 0; i < IXGBE_FCRETA_SIZE; i++) {
|
|
fcoe_i = fcoe->offset + (i % fcoe->indices);
|
|
fcoe_i &= IXGBE_FCRETA_ENTRY_MASK;
|
|
fcoe_q = adapter->rx_ring[fcoe_i]->reg_idx;
|
|
IXGBE_WRITE_REG(hw, IXGBE_FCRETA(i), fcoe_q);
|
|
}
|
|
IXGBE_WRITE_REG(hw, IXGBE_FCRECTL, IXGBE_FCRECTL_ENA);
|
|
|
|
/* Enable L2 EtherType filter for FIP */
|
|
etqf = ETH_P_FIP | IXGBE_ETQF_FILTER_EN;
|
|
if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
|
|
etqf |= IXGBE_ETQF_POOL_ENABLE;
|
|
etqf |= VMDQ_P(0) << IXGBE_ETQF_POOL_SHIFT;
|
|
}
|
|
IXGBE_WRITE_REG(hw, IXGBE_ETQF(IXGBE_ETQF_FILTER_FIP), etqf);
|
|
|
|
/* Send FIP frames to the first FCoE queue */
|
|
fcoe_q = adapter->rx_ring[fcoe->offset]->reg_idx;
|
|
IXGBE_WRITE_REG(hw, IXGBE_ETQS(IXGBE_ETQF_FILTER_FIP),
|
|
IXGBE_ETQS_QUEUE_EN |
|
|
(fcoe_q << IXGBE_ETQS_RX_QUEUE_SHIFT));
|
|
|
|
/* Configure FCoE Rx control */
|
|
IXGBE_WRITE_REG(hw, IXGBE_FCRXCTRL,
|
|
IXGBE_FCRXCTRL_FCCRCBO |
|
|
(FC_FCOE_VER << IXGBE_FCRXCTRL_FCOEVER_SHIFT));
|
|
}
|
|
|
|
/**
|
|
* ixgbe_free_fcoe_ddp_resources - release all fcoe ddp context resources
|
|
* @adapter : ixgbe adapter
|
|
*
|
|
* Cleans up outstanding ddp context resources
|
|
*
|
|
* Returns : none
|
|
*/
|
|
void ixgbe_free_fcoe_ddp_resources(struct ixgbe_adapter *adapter)
|
|
{
|
|
struct ixgbe_fcoe *fcoe = &adapter->fcoe;
|
|
int cpu, i;
|
|
|
|
/* do nothing if no DDP pools were allocated */
|
|
if (!fcoe->ddp_pool)
|
|
return;
|
|
|
|
for (i = 0; i < IXGBE_FCOE_DDP_MAX; i++)
|
|
ixgbe_fcoe_ddp_put(adapter->netdev, i);
|
|
|
|
for_each_possible_cpu(cpu)
|
|
ixgbe_fcoe_dma_pool_free(fcoe, cpu);
|
|
|
|
dma_unmap_single(&adapter->pdev->dev,
|
|
fcoe->extra_ddp_buffer_dma,
|
|
IXGBE_FCBUFF_MIN,
|
|
DMA_FROM_DEVICE);
|
|
kfree(fcoe->extra_ddp_buffer);
|
|
|
|
fcoe->extra_ddp_buffer = NULL;
|
|
fcoe->extra_ddp_buffer_dma = 0;
|
|
}
|
|
|
|
/**
|
|
* ixgbe_setup_fcoe_ddp_resources - setup all fcoe ddp context resources
|
|
* @adapter: ixgbe adapter
|
|
*
|
|
* Sets up ddp context resouces
|
|
*
|
|
* Returns : 0 indicates success or -EINVAL on failure
|
|
*/
|
|
int ixgbe_setup_fcoe_ddp_resources(struct ixgbe_adapter *adapter)
|
|
{
|
|
struct ixgbe_fcoe *fcoe = &adapter->fcoe;
|
|
struct device *dev = &adapter->pdev->dev;
|
|
void *buffer;
|
|
dma_addr_t dma;
|
|
unsigned int cpu;
|
|
|
|
/* do nothing if no DDP pools were allocated */
|
|
if (!fcoe->ddp_pool)
|
|
return 0;
|
|
|
|
/* Extra buffer to be shared by all DDPs for HW work around */
|
|
buffer = kmalloc(IXGBE_FCBUFF_MIN, GFP_ATOMIC);
|
|
if (!buffer)
|
|
return -ENOMEM;
|
|
|
|
dma = dma_map_single(dev, buffer, IXGBE_FCBUFF_MIN, DMA_FROM_DEVICE);
|
|
if (dma_mapping_error(dev, dma)) {
|
|
e_err(drv, "failed to map extra DDP buffer\n");
|
|
kfree(buffer);
|
|
return -ENOMEM;
|
|
}
|
|
|
|
fcoe->extra_ddp_buffer = buffer;
|
|
fcoe->extra_ddp_buffer_dma = dma;
|
|
|
|
/* allocate pci pool for each cpu */
|
|
for_each_possible_cpu(cpu) {
|
|
int err = ixgbe_fcoe_dma_pool_alloc(fcoe, dev, cpu);
|
|
if (!err)
|
|
continue;
|
|
|
|
e_err(drv, "failed to alloc DDP pool on cpu:%d\n", cpu);
|
|
ixgbe_free_fcoe_ddp_resources(adapter);
|
|
return -ENOMEM;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int ixgbe_fcoe_ddp_enable(struct ixgbe_adapter *adapter)
|
|
{
|
|
struct ixgbe_fcoe *fcoe = &adapter->fcoe;
|
|
|
|
if (!(adapter->flags & IXGBE_FLAG_FCOE_CAPABLE))
|
|
return -EINVAL;
|
|
|
|
fcoe->ddp_pool = alloc_percpu(struct ixgbe_fcoe_ddp_pool);
|
|
|
|
if (!fcoe->ddp_pool) {
|
|
e_err(drv, "failed to allocate percpu DDP resources\n");
|
|
return -ENOMEM;
|
|
}
|
|
|
|
adapter->netdev->fcoe_ddp_xid = IXGBE_FCOE_DDP_MAX - 1;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static void ixgbe_fcoe_ddp_disable(struct ixgbe_adapter *adapter)
|
|
{
|
|
struct ixgbe_fcoe *fcoe = &adapter->fcoe;
|
|
|
|
adapter->netdev->fcoe_ddp_xid = 0;
|
|
|
|
if (!fcoe->ddp_pool)
|
|
return;
|
|
|
|
free_percpu(fcoe->ddp_pool);
|
|
fcoe->ddp_pool = NULL;
|
|
}
|
|
|
|
/**
|
|
* ixgbe_fcoe_enable - turn on FCoE offload feature
|
|
* @netdev: the corresponding netdev
|
|
*
|
|
* Turns on FCoE offload feature in 82599.
|
|
*
|
|
* Returns : 0 indicates success or -EINVAL on failure
|
|
*/
|
|
int ixgbe_fcoe_enable(struct net_device *netdev)
|
|
{
|
|
struct ixgbe_adapter *adapter = netdev_priv(netdev);
|
|
struct ixgbe_fcoe *fcoe = &adapter->fcoe;
|
|
|
|
atomic_inc(&fcoe->refcnt);
|
|
|
|
if (!(adapter->flags & IXGBE_FLAG_FCOE_CAPABLE))
|
|
return -EINVAL;
|
|
|
|
if (adapter->flags & IXGBE_FLAG_FCOE_ENABLED)
|
|
return -EINVAL;
|
|
|
|
e_info(drv, "Enabling FCoE offload features.\n");
|
|
|
|
if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
|
|
e_warn(probe, "Enabling FCoE on PF will disable legacy VFs\n");
|
|
|
|
if (netif_running(netdev))
|
|
netdev->netdev_ops->ndo_stop(netdev);
|
|
|
|
/* Allocate per CPU memory to track DDP pools */
|
|
ixgbe_fcoe_ddp_enable(adapter);
|
|
|
|
/* enable FCoE and notify stack */
|
|
adapter->flags |= IXGBE_FLAG_FCOE_ENABLED;
|
|
netdev->features |= NETIF_F_FCOE_MTU;
|
|
netdev_features_change(netdev);
|
|
|
|
/* release existing queues and reallocate them */
|
|
ixgbe_clear_interrupt_scheme(adapter);
|
|
ixgbe_init_interrupt_scheme(adapter);
|
|
|
|
if (netif_running(netdev))
|
|
netdev->netdev_ops->ndo_open(netdev);
|
|
|
|
return 0;
|
|
}
|
|
|
|
/**
|
|
* ixgbe_fcoe_disable - turn off FCoE offload feature
|
|
* @netdev: the corresponding netdev
|
|
*
|
|
* Turns off FCoE offload feature in 82599.
|
|
*
|
|
* Returns : 0 indicates success or -EINVAL on failure
|
|
*/
|
|
int ixgbe_fcoe_disable(struct net_device *netdev)
|
|
{
|
|
struct ixgbe_adapter *adapter = netdev_priv(netdev);
|
|
|
|
if (!atomic_dec_and_test(&adapter->fcoe.refcnt))
|
|
return -EINVAL;
|
|
|
|
if (!(adapter->flags & IXGBE_FLAG_FCOE_ENABLED))
|
|
return -EINVAL;
|
|
|
|
e_info(drv, "Disabling FCoE offload features.\n");
|
|
if (netif_running(netdev))
|
|
netdev->netdev_ops->ndo_stop(netdev);
|
|
|
|
/* Free per CPU memory to track DDP pools */
|
|
ixgbe_fcoe_ddp_disable(adapter);
|
|
|
|
/* disable FCoE and notify stack */
|
|
adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
|
|
netdev->features &= ~NETIF_F_FCOE_MTU;
|
|
|
|
netdev_features_change(netdev);
|
|
|
|
/* release existing queues and reallocate them */
|
|
ixgbe_clear_interrupt_scheme(adapter);
|
|
ixgbe_init_interrupt_scheme(adapter);
|
|
|
|
if (netif_running(netdev))
|
|
netdev->netdev_ops->ndo_open(netdev);
|
|
|
|
return 0;
|
|
}
|
|
|
|
/**
|
|
* ixgbe_fcoe_get_wwn - get world wide name for the node or the port
|
|
* @netdev : ixgbe adapter
|
|
* @wwn : the world wide name
|
|
* @type: the type of world wide name
|
|
*
|
|
* Returns the node or port world wide name if both the prefix and the san
|
|
* mac address are valid, then the wwn is formed based on the NAA-2 for
|
|
* IEEE Extended name identifier (ref. to T10 FC-LS Spec., Sec. 15.3).
|
|
*
|
|
* Returns : 0 on success
|
|
*/
|
|
int ixgbe_fcoe_get_wwn(struct net_device *netdev, u64 *wwn, int type)
|
|
{
|
|
u16 prefix = 0xffff;
|
|
struct ixgbe_adapter *adapter = netdev_priv(netdev);
|
|
struct ixgbe_mac_info *mac = &adapter->hw.mac;
|
|
|
|
switch (type) {
|
|
case NETDEV_FCOE_WWNN:
|
|
prefix = mac->wwnn_prefix;
|
|
break;
|
|
case NETDEV_FCOE_WWPN:
|
|
prefix = mac->wwpn_prefix;
|
|
break;
|
|
default:
|
|
break;
|
|
}
|
|
|
|
if ((prefix != 0xffff) &&
|
|
is_valid_ether_addr(mac->san_addr)) {
|
|
*wwn = ((u64) prefix << 48) |
|
|
((u64) mac->san_addr[0] << 40) |
|
|
((u64) mac->san_addr[1] << 32) |
|
|
((u64) mac->san_addr[2] << 24) |
|
|
((u64) mac->san_addr[3] << 16) |
|
|
((u64) mac->san_addr[4] << 8) |
|
|
((u64) mac->san_addr[5]);
|
|
return 0;
|
|
}
|
|
return -EINVAL;
|
|
}
|
|
|
|
/**
|
|
* ixgbe_fcoe_get_hbainfo - get FCoE HBA information
|
|
* @netdev : ixgbe adapter
|
|
* @info : HBA information
|
|
*
|
|
* Returns ixgbe HBA information
|
|
*
|
|
* Returns : 0 on success
|
|
*/
|
|
int ixgbe_fcoe_get_hbainfo(struct net_device *netdev,
|
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struct netdev_fcoe_hbainfo *info)
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{
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struct ixgbe_adapter *adapter = netdev_priv(netdev);
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struct ixgbe_hw *hw = &adapter->hw;
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int i, pos;
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u8 buf[8];
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if (!info)
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return -EINVAL;
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/* Don't return information on unsupported devices */
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if (hw->mac.type != ixgbe_mac_82599EB &&
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hw->mac.type != ixgbe_mac_X540)
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return -EINVAL;
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/* Manufacturer */
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snprintf(info->manufacturer, sizeof(info->manufacturer),
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"Intel Corporation");
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/* Serial Number */
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/* Get the PCI-e Device Serial Number Capability */
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pos = pci_find_ext_capability(adapter->pdev, PCI_EXT_CAP_ID_DSN);
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if (pos) {
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pos += 4;
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for (i = 0; i < 8; i++)
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pci_read_config_byte(adapter->pdev, pos + i, &buf[i]);
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snprintf(info->serial_number, sizeof(info->serial_number),
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"%02X%02X%02X%02X%02X%02X%02X%02X",
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buf[7], buf[6], buf[5], buf[4],
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buf[3], buf[2], buf[1], buf[0]);
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} else
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snprintf(info->serial_number, sizeof(info->serial_number),
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"Unknown");
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/* Hardware Version */
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snprintf(info->hardware_version,
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sizeof(info->hardware_version),
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"Rev %d", hw->revision_id);
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/* Driver Name/Version */
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snprintf(info->driver_version,
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sizeof(info->driver_version),
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"%s v%s",
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ixgbe_driver_name,
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ixgbe_driver_version);
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/* Firmware Version */
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snprintf(info->firmware_version,
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sizeof(info->firmware_version),
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"0x%08x",
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(adapter->eeprom_verh << 16) |
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adapter->eeprom_verl);
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/* Model */
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if (hw->mac.type == ixgbe_mac_82599EB) {
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snprintf(info->model,
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sizeof(info->model),
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"Intel 82599");
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} else {
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snprintf(info->model,
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sizeof(info->model),
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"Intel X540");
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}
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/* Model Description */
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snprintf(info->model_description,
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sizeof(info->model_description),
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"%s",
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ixgbe_default_device_descr);
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return 0;
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}
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/**
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* ixgbe_fcoe_get_tc - get the current TC that fcoe is mapped to
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* @adapter - pointer to the device adapter structure
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*
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* Return : TC that FCoE is mapped to
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*/
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u8 ixgbe_fcoe_get_tc(struct ixgbe_adapter *adapter)
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{
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#ifdef CONFIG_IXGBE_DCB
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return netdev_get_prio_tc_map(adapter->netdev, adapter->fcoe.up);
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#else
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return 0;
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#endif
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}
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