mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-21 13:58:41 +07:00
5c7ed43854
There are multiple scenarios where the HMAT may contain information about proximity domains that are not currently online. Rather than fail to report any HMAT data just elide those offline domains. If and when those domains are later onlined they can be added to the HMEM reporting at that point. This was found while testing EFI_MEMORY_SP support which reserves "specific purpose" memory from the general allocation pool. If that reservation results in an empty numa-node then the node is not marked online leading a spurious: "acpi/hmat: Ignoring HMAT: Invalid table" ...result for HMAT parsing. Reviewed-by: Dave Hansen <dave.hansen@linux.intel.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Keith Busch <keith.busch@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
752 lines
18 KiB
C
752 lines
18 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (c) 2019, Intel Corporation.
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*
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* Heterogeneous Memory Attributes Table (HMAT) representation
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*
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* This program parses and reports the platform's HMAT tables, and registers
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* the applicable attributes with the node's interfaces.
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*/
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#include <linux/acpi.h>
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#include <linux/bitops.h>
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#include <linux/device.h>
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#include <linux/init.h>
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#include <linux/list.h>
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#include <linux/list_sort.h>
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#include <linux/memory.h>
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#include <linux/mutex.h>
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#include <linux/node.h>
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#include <linux/sysfs.h>
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static u8 hmat_revision;
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static LIST_HEAD(targets);
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static LIST_HEAD(initiators);
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static LIST_HEAD(localities);
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static DEFINE_MUTEX(target_lock);
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/*
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* The defined enum order is used to prioritize attributes to break ties when
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* selecting the best performing node.
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*/
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enum locality_types {
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WRITE_LATENCY,
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READ_LATENCY,
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WRITE_BANDWIDTH,
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READ_BANDWIDTH,
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};
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static struct memory_locality *localities_types[4];
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struct target_cache {
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struct list_head node;
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struct node_cache_attrs cache_attrs;
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};
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struct memory_target {
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struct list_head node;
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unsigned int memory_pxm;
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unsigned int processor_pxm;
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struct node_hmem_attrs hmem_attrs;
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struct list_head caches;
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struct node_cache_attrs cache_attrs;
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bool registered;
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};
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struct memory_initiator {
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struct list_head node;
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unsigned int processor_pxm;
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};
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struct memory_locality {
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struct list_head node;
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struct acpi_hmat_locality *hmat_loc;
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};
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static struct memory_initiator *find_mem_initiator(unsigned int cpu_pxm)
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{
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struct memory_initiator *initiator;
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list_for_each_entry(initiator, &initiators, node)
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if (initiator->processor_pxm == cpu_pxm)
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return initiator;
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return NULL;
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}
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static struct memory_target *find_mem_target(unsigned int mem_pxm)
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{
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struct memory_target *target;
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list_for_each_entry(target, &targets, node)
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if (target->memory_pxm == mem_pxm)
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return target;
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return NULL;
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}
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static __init void alloc_memory_initiator(unsigned int cpu_pxm)
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{
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struct memory_initiator *initiator;
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if (pxm_to_node(cpu_pxm) == NUMA_NO_NODE)
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return;
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initiator = find_mem_initiator(cpu_pxm);
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if (initiator)
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return;
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initiator = kzalloc(sizeof(*initiator), GFP_KERNEL);
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if (!initiator)
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return;
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initiator->processor_pxm = cpu_pxm;
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list_add_tail(&initiator->node, &initiators);
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}
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static __init void alloc_memory_target(unsigned int mem_pxm)
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{
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struct memory_target *target;
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target = find_mem_target(mem_pxm);
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if (target)
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return;
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target = kzalloc(sizeof(*target), GFP_KERNEL);
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if (!target)
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return;
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target->memory_pxm = mem_pxm;
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target->processor_pxm = PXM_INVAL;
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list_add_tail(&target->node, &targets);
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INIT_LIST_HEAD(&target->caches);
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}
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static __init const char *hmat_data_type(u8 type)
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{
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switch (type) {
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case ACPI_HMAT_ACCESS_LATENCY:
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return "Access Latency";
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case ACPI_HMAT_READ_LATENCY:
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return "Read Latency";
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case ACPI_HMAT_WRITE_LATENCY:
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return "Write Latency";
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case ACPI_HMAT_ACCESS_BANDWIDTH:
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return "Access Bandwidth";
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case ACPI_HMAT_READ_BANDWIDTH:
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return "Read Bandwidth";
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case ACPI_HMAT_WRITE_BANDWIDTH:
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return "Write Bandwidth";
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default:
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return "Reserved";
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}
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}
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static __init const char *hmat_data_type_suffix(u8 type)
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{
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switch (type) {
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case ACPI_HMAT_ACCESS_LATENCY:
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case ACPI_HMAT_READ_LATENCY:
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case ACPI_HMAT_WRITE_LATENCY:
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return " nsec";
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case ACPI_HMAT_ACCESS_BANDWIDTH:
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case ACPI_HMAT_READ_BANDWIDTH:
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case ACPI_HMAT_WRITE_BANDWIDTH:
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return " MB/s";
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default:
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return "";
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}
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}
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static u32 hmat_normalize(u16 entry, u64 base, u8 type)
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{
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u32 value;
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/*
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* Check for invalid and overflow values
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*/
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if (entry == 0xffff || !entry)
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return 0;
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else if (base > (UINT_MAX / (entry)))
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return 0;
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/*
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* Divide by the base unit for version 1, convert latency from
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* picosenonds to nanoseconds if revision 2.
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*/
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value = entry * base;
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if (hmat_revision == 1) {
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if (value < 10)
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return 0;
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value = DIV_ROUND_UP(value, 10);
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} else if (hmat_revision == 2) {
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switch (type) {
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case ACPI_HMAT_ACCESS_LATENCY:
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case ACPI_HMAT_READ_LATENCY:
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case ACPI_HMAT_WRITE_LATENCY:
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value = DIV_ROUND_UP(value, 1000);
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break;
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default:
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break;
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}
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}
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return value;
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}
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static void hmat_update_target_access(struct memory_target *target,
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u8 type, u32 value)
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{
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switch (type) {
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case ACPI_HMAT_ACCESS_LATENCY:
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target->hmem_attrs.read_latency = value;
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target->hmem_attrs.write_latency = value;
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break;
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case ACPI_HMAT_READ_LATENCY:
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target->hmem_attrs.read_latency = value;
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break;
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case ACPI_HMAT_WRITE_LATENCY:
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target->hmem_attrs.write_latency = value;
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break;
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case ACPI_HMAT_ACCESS_BANDWIDTH:
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target->hmem_attrs.read_bandwidth = value;
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target->hmem_attrs.write_bandwidth = value;
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break;
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case ACPI_HMAT_READ_BANDWIDTH:
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target->hmem_attrs.read_bandwidth = value;
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break;
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case ACPI_HMAT_WRITE_BANDWIDTH:
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target->hmem_attrs.write_bandwidth = value;
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break;
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default:
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break;
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}
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}
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static __init void hmat_add_locality(struct acpi_hmat_locality *hmat_loc)
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{
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struct memory_locality *loc;
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loc = kzalloc(sizeof(*loc), GFP_KERNEL);
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if (!loc) {
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pr_notice_once("Failed to allocate HMAT locality\n");
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return;
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}
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loc->hmat_loc = hmat_loc;
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list_add_tail(&loc->node, &localities);
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switch (hmat_loc->data_type) {
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case ACPI_HMAT_ACCESS_LATENCY:
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localities_types[READ_LATENCY] = loc;
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localities_types[WRITE_LATENCY] = loc;
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break;
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case ACPI_HMAT_READ_LATENCY:
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localities_types[READ_LATENCY] = loc;
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break;
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case ACPI_HMAT_WRITE_LATENCY:
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localities_types[WRITE_LATENCY] = loc;
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break;
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case ACPI_HMAT_ACCESS_BANDWIDTH:
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localities_types[READ_BANDWIDTH] = loc;
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localities_types[WRITE_BANDWIDTH] = loc;
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break;
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case ACPI_HMAT_READ_BANDWIDTH:
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localities_types[READ_BANDWIDTH] = loc;
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break;
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case ACPI_HMAT_WRITE_BANDWIDTH:
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localities_types[WRITE_BANDWIDTH] = loc;
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break;
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default:
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break;
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}
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}
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static __init int hmat_parse_locality(union acpi_subtable_headers *header,
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const unsigned long end)
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{
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struct acpi_hmat_locality *hmat_loc = (void *)header;
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struct memory_target *target;
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unsigned int init, targ, total_size, ipds, tpds;
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u32 *inits, *targs, value;
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u16 *entries;
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u8 type, mem_hier;
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if (hmat_loc->header.length < sizeof(*hmat_loc)) {
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pr_notice("HMAT: Unexpected locality header length: %d\n",
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hmat_loc->header.length);
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return -EINVAL;
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}
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type = hmat_loc->data_type;
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mem_hier = hmat_loc->flags & ACPI_HMAT_MEMORY_HIERARCHY;
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ipds = hmat_loc->number_of_initiator_Pds;
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tpds = hmat_loc->number_of_target_Pds;
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total_size = sizeof(*hmat_loc) + sizeof(*entries) * ipds * tpds +
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sizeof(*inits) * ipds + sizeof(*targs) * tpds;
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if (hmat_loc->header.length < total_size) {
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pr_notice("HMAT: Unexpected locality header length:%d, minimum required:%d\n",
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hmat_loc->header.length, total_size);
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return -EINVAL;
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}
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pr_info("HMAT: Locality: Flags:%02x Type:%s Initiator Domains:%d Target Domains:%d Base:%lld\n",
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hmat_loc->flags, hmat_data_type(type), ipds, tpds,
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hmat_loc->entry_base_unit);
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inits = (u32 *)(hmat_loc + 1);
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targs = inits + ipds;
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entries = (u16 *)(targs + tpds);
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for (init = 0; init < ipds; init++) {
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alloc_memory_initiator(inits[init]);
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for (targ = 0; targ < tpds; targ++) {
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value = hmat_normalize(entries[init * tpds + targ],
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hmat_loc->entry_base_unit,
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type);
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pr_info(" Initiator-Target[%d-%d]:%d%s\n",
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inits[init], targs[targ], value,
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hmat_data_type_suffix(type));
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if (mem_hier == ACPI_HMAT_MEMORY) {
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target = find_mem_target(targs[targ]);
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if (target && target->processor_pxm == inits[init])
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hmat_update_target_access(target, type, value);
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}
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}
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}
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if (mem_hier == ACPI_HMAT_MEMORY)
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hmat_add_locality(hmat_loc);
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return 0;
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}
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static __init int hmat_parse_cache(union acpi_subtable_headers *header,
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const unsigned long end)
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{
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struct acpi_hmat_cache *cache = (void *)header;
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struct memory_target *target;
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struct target_cache *tcache;
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u32 attrs;
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if (cache->header.length < sizeof(*cache)) {
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pr_notice("HMAT: Unexpected cache header length: %d\n",
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cache->header.length);
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return -EINVAL;
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}
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attrs = cache->cache_attributes;
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pr_info("HMAT: Cache: Domain:%d Size:%llu Attrs:%08x SMBIOS Handles:%d\n",
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cache->memory_PD, cache->cache_size, attrs,
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cache->number_of_SMBIOShandles);
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target = find_mem_target(cache->memory_PD);
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if (!target)
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return 0;
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tcache = kzalloc(sizeof(*tcache), GFP_KERNEL);
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if (!tcache) {
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pr_notice_once("Failed to allocate HMAT cache info\n");
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return 0;
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}
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tcache->cache_attrs.size = cache->cache_size;
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tcache->cache_attrs.level = (attrs & ACPI_HMAT_CACHE_LEVEL) >> 4;
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tcache->cache_attrs.line_size = (attrs & ACPI_HMAT_CACHE_LINE_SIZE) >> 16;
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switch ((attrs & ACPI_HMAT_CACHE_ASSOCIATIVITY) >> 8) {
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case ACPI_HMAT_CA_DIRECT_MAPPED:
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tcache->cache_attrs.indexing = NODE_CACHE_DIRECT_MAP;
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break;
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case ACPI_HMAT_CA_COMPLEX_CACHE_INDEXING:
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tcache->cache_attrs.indexing = NODE_CACHE_INDEXED;
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break;
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case ACPI_HMAT_CA_NONE:
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default:
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tcache->cache_attrs.indexing = NODE_CACHE_OTHER;
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break;
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}
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switch ((attrs & ACPI_HMAT_WRITE_POLICY) >> 12) {
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case ACPI_HMAT_CP_WB:
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tcache->cache_attrs.write_policy = NODE_CACHE_WRITE_BACK;
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break;
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case ACPI_HMAT_CP_WT:
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tcache->cache_attrs.write_policy = NODE_CACHE_WRITE_THROUGH;
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break;
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case ACPI_HMAT_CP_NONE:
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default:
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tcache->cache_attrs.write_policy = NODE_CACHE_WRITE_OTHER;
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break;
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}
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list_add_tail(&tcache->node, &target->caches);
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return 0;
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}
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static int __init hmat_parse_proximity_domain(union acpi_subtable_headers *header,
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const unsigned long end)
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{
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struct acpi_hmat_proximity_domain *p = (void *)header;
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struct memory_target *target = NULL;
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if (p->header.length != sizeof(*p)) {
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pr_notice("HMAT: Unexpected address range header length: %d\n",
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p->header.length);
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return -EINVAL;
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}
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if (hmat_revision == 1)
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pr_info("HMAT: Memory (%#llx length %#llx) Flags:%04x Processor Domain:%d Memory Domain:%d\n",
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p->reserved3, p->reserved4, p->flags, p->processor_PD,
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p->memory_PD);
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else
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pr_info("HMAT: Memory Flags:%04x Processor Domain:%d Memory Domain:%d\n",
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p->flags, p->processor_PD, p->memory_PD);
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if (p->flags & ACPI_HMAT_MEMORY_PD_VALID) {
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target = find_mem_target(p->memory_PD);
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if (!target) {
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pr_debug("HMAT: Memory Domain missing from SRAT\n");
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return -EINVAL;
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}
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}
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if (target && p->flags & ACPI_HMAT_PROCESSOR_PD_VALID) {
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int p_node = pxm_to_node(p->processor_PD);
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if (p_node == NUMA_NO_NODE) {
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pr_debug("HMAT: Invalid Processor Domain\n");
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return -EINVAL;
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}
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target->processor_pxm = p_node;
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}
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return 0;
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}
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static int __init hmat_parse_subtable(union acpi_subtable_headers *header,
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const unsigned long end)
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{
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struct acpi_hmat_structure *hdr = (void *)header;
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if (!hdr)
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return -EINVAL;
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switch (hdr->type) {
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case ACPI_HMAT_TYPE_PROXIMITY:
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return hmat_parse_proximity_domain(header, end);
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case ACPI_HMAT_TYPE_LOCALITY:
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return hmat_parse_locality(header, end);
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case ACPI_HMAT_TYPE_CACHE:
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return hmat_parse_cache(header, end);
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default:
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return -EINVAL;
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}
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}
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static __init int srat_parse_mem_affinity(union acpi_subtable_headers *header,
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const unsigned long end)
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{
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struct acpi_srat_mem_affinity *ma = (void *)header;
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if (!ma)
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return -EINVAL;
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if (!(ma->flags & ACPI_SRAT_MEM_ENABLED))
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return 0;
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alloc_memory_target(ma->proximity_domain);
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return 0;
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}
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static u32 hmat_initiator_perf(struct memory_target *target,
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struct memory_initiator *initiator,
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struct acpi_hmat_locality *hmat_loc)
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{
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unsigned int ipds, tpds, i, idx = 0, tdx = 0;
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u32 *inits, *targs;
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u16 *entries;
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ipds = hmat_loc->number_of_initiator_Pds;
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tpds = hmat_loc->number_of_target_Pds;
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inits = (u32 *)(hmat_loc + 1);
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targs = inits + ipds;
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entries = (u16 *)(targs + tpds);
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for (i = 0; i < ipds; i++) {
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if (inits[i] == initiator->processor_pxm) {
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idx = i;
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break;
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}
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}
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if (i == ipds)
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return 0;
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for (i = 0; i < tpds; i++) {
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if (targs[i] == target->memory_pxm) {
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tdx = i;
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break;
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}
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}
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if (i == tpds)
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return 0;
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return hmat_normalize(entries[idx * tpds + tdx],
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hmat_loc->entry_base_unit,
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hmat_loc->data_type);
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}
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static bool hmat_update_best(u8 type, u32 value, u32 *best)
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{
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bool updated = false;
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if (!value)
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return false;
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|
switch (type) {
|
|
case ACPI_HMAT_ACCESS_LATENCY:
|
|
case ACPI_HMAT_READ_LATENCY:
|
|
case ACPI_HMAT_WRITE_LATENCY:
|
|
if (!*best || *best > value) {
|
|
*best = value;
|
|
updated = true;
|
|
}
|
|
break;
|
|
case ACPI_HMAT_ACCESS_BANDWIDTH:
|
|
case ACPI_HMAT_READ_BANDWIDTH:
|
|
case ACPI_HMAT_WRITE_BANDWIDTH:
|
|
if (!*best || *best < value) {
|
|
*best = value;
|
|
updated = true;
|
|
}
|
|
break;
|
|
}
|
|
|
|
return updated;
|
|
}
|
|
|
|
static int initiator_cmp(void *priv, struct list_head *a, struct list_head *b)
|
|
{
|
|
struct memory_initiator *ia;
|
|
struct memory_initiator *ib;
|
|
unsigned long *p_nodes = priv;
|
|
|
|
ia = list_entry(a, struct memory_initiator, node);
|
|
ib = list_entry(b, struct memory_initiator, node);
|
|
|
|
set_bit(ia->processor_pxm, p_nodes);
|
|
set_bit(ib->processor_pxm, p_nodes);
|
|
|
|
return ia->processor_pxm - ib->processor_pxm;
|
|
}
|
|
|
|
static void hmat_register_target_initiators(struct memory_target *target)
|
|
{
|
|
static DECLARE_BITMAP(p_nodes, MAX_NUMNODES);
|
|
struct memory_initiator *initiator;
|
|
unsigned int mem_nid, cpu_nid;
|
|
struct memory_locality *loc = NULL;
|
|
u32 best = 0;
|
|
int i;
|
|
|
|
mem_nid = pxm_to_node(target->memory_pxm);
|
|
/*
|
|
* If the Address Range Structure provides a local processor pxm, link
|
|
* only that one. Otherwise, find the best performance attributes and
|
|
* register all initiators that match.
|
|
*/
|
|
if (target->processor_pxm != PXM_INVAL) {
|
|
cpu_nid = pxm_to_node(target->processor_pxm);
|
|
register_memory_node_under_compute_node(mem_nid, cpu_nid, 0);
|
|
return;
|
|
}
|
|
|
|
if (list_empty(&localities))
|
|
return;
|
|
|
|
/*
|
|
* We need the initiator list sorted so we can use bitmap_clear for
|
|
* previously set initiators when we find a better memory accessor.
|
|
* We'll also use the sorting to prime the candidate nodes with known
|
|
* initiators.
|
|
*/
|
|
bitmap_zero(p_nodes, MAX_NUMNODES);
|
|
list_sort(p_nodes, &initiators, initiator_cmp);
|
|
for (i = WRITE_LATENCY; i <= READ_BANDWIDTH; i++) {
|
|
loc = localities_types[i];
|
|
if (!loc)
|
|
continue;
|
|
|
|
best = 0;
|
|
list_for_each_entry(initiator, &initiators, node) {
|
|
u32 value;
|
|
|
|
if (!test_bit(initiator->processor_pxm, p_nodes))
|
|
continue;
|
|
|
|
value = hmat_initiator_perf(target, initiator, loc->hmat_loc);
|
|
if (hmat_update_best(loc->hmat_loc->data_type, value, &best))
|
|
bitmap_clear(p_nodes, 0, initiator->processor_pxm);
|
|
if (value != best)
|
|
clear_bit(initiator->processor_pxm, p_nodes);
|
|
}
|
|
if (best)
|
|
hmat_update_target_access(target, loc->hmat_loc->data_type, best);
|
|
}
|
|
|
|
for_each_set_bit(i, p_nodes, MAX_NUMNODES) {
|
|
cpu_nid = pxm_to_node(i);
|
|
register_memory_node_under_compute_node(mem_nid, cpu_nid, 0);
|
|
}
|
|
}
|
|
|
|
static void hmat_register_target_cache(struct memory_target *target)
|
|
{
|
|
unsigned mem_nid = pxm_to_node(target->memory_pxm);
|
|
struct target_cache *tcache;
|
|
|
|
list_for_each_entry(tcache, &target->caches, node)
|
|
node_add_cache(mem_nid, &tcache->cache_attrs);
|
|
}
|
|
|
|
static void hmat_register_target_perf(struct memory_target *target)
|
|
{
|
|
unsigned mem_nid = pxm_to_node(target->memory_pxm);
|
|
node_set_perf_attrs(mem_nid, &target->hmem_attrs, 0);
|
|
}
|
|
|
|
static void hmat_register_target(struct memory_target *target)
|
|
{
|
|
int nid = pxm_to_node(target->memory_pxm);
|
|
|
|
/*
|
|
* Skip offline nodes. This can happen when memory
|
|
* marked EFI_MEMORY_SP, "specific purpose", is applied
|
|
* to all the memory in a promixity domain leading to
|
|
* the node being marked offline / unplugged, or if
|
|
* memory-only "hotplug" node is offline.
|
|
*/
|
|
if (nid == NUMA_NO_NODE || !node_online(nid))
|
|
return;
|
|
|
|
mutex_lock(&target_lock);
|
|
if (!target->registered) {
|
|
hmat_register_target_initiators(target);
|
|
hmat_register_target_cache(target);
|
|
hmat_register_target_perf(target);
|
|
target->registered = true;
|
|
}
|
|
mutex_unlock(&target_lock);
|
|
}
|
|
|
|
static void hmat_register_targets(void)
|
|
{
|
|
struct memory_target *target;
|
|
|
|
list_for_each_entry(target, &targets, node)
|
|
hmat_register_target(target);
|
|
}
|
|
|
|
static int hmat_callback(struct notifier_block *self,
|
|
unsigned long action, void *arg)
|
|
{
|
|
struct memory_target *target;
|
|
struct memory_notify *mnb = arg;
|
|
int pxm, nid = mnb->status_change_nid;
|
|
|
|
if (nid == NUMA_NO_NODE || action != MEM_ONLINE)
|
|
return NOTIFY_OK;
|
|
|
|
pxm = node_to_pxm(nid);
|
|
target = find_mem_target(pxm);
|
|
if (!target)
|
|
return NOTIFY_OK;
|
|
|
|
hmat_register_target(target);
|
|
return NOTIFY_OK;
|
|
}
|
|
|
|
static struct notifier_block hmat_callback_nb = {
|
|
.notifier_call = hmat_callback,
|
|
.priority = 2,
|
|
};
|
|
|
|
static __init void hmat_free_structures(void)
|
|
{
|
|
struct memory_target *target, *tnext;
|
|
struct memory_locality *loc, *lnext;
|
|
struct memory_initiator *initiator, *inext;
|
|
struct target_cache *tcache, *cnext;
|
|
|
|
list_for_each_entry_safe(target, tnext, &targets, node) {
|
|
list_for_each_entry_safe(tcache, cnext, &target->caches, node) {
|
|
list_del(&tcache->node);
|
|
kfree(tcache);
|
|
}
|
|
list_del(&target->node);
|
|
kfree(target);
|
|
}
|
|
|
|
list_for_each_entry_safe(initiator, inext, &initiators, node) {
|
|
list_del(&initiator->node);
|
|
kfree(initiator);
|
|
}
|
|
|
|
list_for_each_entry_safe(loc, lnext, &localities, node) {
|
|
list_del(&loc->node);
|
|
kfree(loc);
|
|
}
|
|
}
|
|
|
|
static __init int hmat_init(void)
|
|
{
|
|
struct acpi_table_header *tbl;
|
|
enum acpi_hmat_type i;
|
|
acpi_status status;
|
|
|
|
if (srat_disabled())
|
|
return 0;
|
|
|
|
status = acpi_get_table(ACPI_SIG_SRAT, 0, &tbl);
|
|
if (ACPI_FAILURE(status))
|
|
return 0;
|
|
|
|
if (acpi_table_parse_entries(ACPI_SIG_SRAT,
|
|
sizeof(struct acpi_table_srat),
|
|
ACPI_SRAT_TYPE_MEMORY_AFFINITY,
|
|
srat_parse_mem_affinity, 0) < 0)
|
|
goto out_put;
|
|
acpi_put_table(tbl);
|
|
|
|
status = acpi_get_table(ACPI_SIG_HMAT, 0, &tbl);
|
|
if (ACPI_FAILURE(status))
|
|
goto out_put;
|
|
|
|
hmat_revision = tbl->revision;
|
|
switch (hmat_revision) {
|
|
case 1:
|
|
case 2:
|
|
break;
|
|
default:
|
|
pr_notice("Ignoring HMAT: Unknown revision:%d\n", hmat_revision);
|
|
goto out_put;
|
|
}
|
|
|
|
for (i = ACPI_HMAT_TYPE_PROXIMITY; i < ACPI_HMAT_TYPE_RESERVED; i++) {
|
|
if (acpi_table_parse_entries(ACPI_SIG_HMAT,
|
|
sizeof(struct acpi_table_hmat), i,
|
|
hmat_parse_subtable, 0) < 0) {
|
|
pr_notice("Ignoring HMAT: Invalid table");
|
|
goto out_put;
|
|
}
|
|
}
|
|
hmat_register_targets();
|
|
|
|
/* Keep the table and structures if the notifier may use them */
|
|
if (!register_hotmemory_notifier(&hmat_callback_nb))
|
|
return 0;
|
|
out_put:
|
|
hmat_free_structures();
|
|
acpi_put_table(tbl);
|
|
return 0;
|
|
}
|
|
subsys_initcall(hmat_init);
|