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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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63f44b2bfc
Add generic RMII-Reference-Clock-Select support.
Several Micrel PHY have an RMII-Reference-Clock-Select bit to select
25 MHz or 50 MHz clock mode. Recently, support for configuring this
through device tree for KSZ8021 and KSZ8031 was added.
Generalise this support so that it can be configured for other PHY types
as well.
Note that some PHY revisions (of the same type) has this bit inverted.
This should be either configurable through a new device-tree property,
or preferably, determined based on PHY ID if possible.
Also note that this removes support for setting 25 MHz mode from board
files which was also added by the above mentioned commit 45f56cb82e45
("net/phy: micrel: Add clock support for KSZ8021/KSZ8031").
Signed-off-by: Johan Hovold <johan@kernel.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
47 lines
1.3 KiB
C
47 lines
1.3 KiB
C
/*
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* include/linux/micrel_phy.h
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*
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* Micrel PHY IDs
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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*/
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#ifndef _MICREL_PHY_H
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#define _MICREL_PHY_H
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#define MICREL_PHY_ID_MASK 0x00fffff0
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#define PHY_ID_KSZ8873MLL 0x000e7237
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#define PHY_ID_KSZ9021 0x00221610
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#define PHY_ID_KSZ9021RLRN 0x00221611
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#define PHY_ID_KS8737 0x00221720
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#define PHY_ID_KSZ8021 0x00221555
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#define PHY_ID_KSZ8031 0x00221556
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#define PHY_ID_KSZ8041 0x00221510
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/* undocumented */
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#define PHY_ID_KSZ8041RNLI 0x00221537
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#define PHY_ID_KSZ8051 0x00221550
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/* same id: ks8001 Rev. A/B, and ks8721 Rev 3. */
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#define PHY_ID_KSZ8001 0x0022161A
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/* same id: KS8081, KS8091 */
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#define PHY_ID_KSZ8081 0x00221560
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#define PHY_ID_KSZ8061 0x00221570
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#define PHY_ID_KSZ9031 0x00221620
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#define PHY_ID_KSZ886X 0x00221430
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#define PHY_ID_KSZ8863 0x00221435
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/* struct phy_device dev_flags definitions */
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#define MICREL_PHY_50MHZ_CLK 0x00000001
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#define MICREL_KSZ9021_EXTREG_CTRL 0xB
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#define MICREL_KSZ9021_EXTREG_DATA_WRITE 0xC
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#define MICREL_KSZ9021_RGMII_CLK_CTRL_PAD_SCEW 0x104
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#define MICREL_KSZ9021_RGMII_RX_DATA_PAD_SCEW 0x105
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#endif /* _MICREL_PHY_H */
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