linux_dsm_epyc7002/include/uapi
John Crispin 9b8777e347 serial: of: add a PORT_RT2880 definition
The Ralink RT2880 SoC and its successors have an internal 8250 core. This core
needs the same quirks applied as the AMD AU1xxx uart. In addition to these
quirks, the ports memory region is only 0x100 unlike the AU1xxx which has a
size of 0x1000.

Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2014-11-06 14:57:18 -08:00
..
asm-generic
drm
linux serial: of: add a PORT_RT2880 definition 2014-11-06 14:57:18 -08:00
misc
mtd
rdma
scsi
sound
video
xen
Kbuild