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When pointer authentication is supported, a guest may wish to use it. This patch adds the necessary KVM infrastructure for this to work, with a semi-lazy context switch of the pointer auth state. Pointer authentication feature is only enabled when VHE is built in the kernel and present in the CPU implementation so only VHE code paths are modified. When we schedule a vcpu, we disable guest usage of pointer authentication instructions and accesses to the keys. While these are disabled, we avoid context-switching the keys. When we trap the guest trying to use pointer authentication functionality, we change to eagerly context-switching the keys, and enable the feature. The next time the vcpu is scheduled out/in, we start again. However the host key save is optimized and implemented inside ptrauth instruction/register access trap. Pointer authentication consists of address authentication and generic authentication, and CPUs in a system might have varied support for either. Where support for either feature is not uniform, it is hidden from guests via ID register emulation, as a result of the cpufeature framework in the host. Unfortunately, address authentication and generic authentication cannot be trapped separately, as the architecture provides a single EL2 trap covering both. If we wish to expose one without the other, we cannot prevent a (badly-written) guest from intermittently using a feature which is not uniformly supported (when scheduled on a physical CPU which supports the relevant feature). Hence, this patch expects both type of authentication to be present in a cpu. This switch of key is done from guest enter/exit assembly as preparation for the upcoming in-kernel pointer authentication support. Hence, these key switching routines are not implemented in C code as they may cause pointer authentication key signing error in some situations. Signed-off-by: Mark Rutland <mark.rutland@arm.com> [Only VHE, key switch in full assembly, vcpu_has_ptrauth checks , save host key in ptrauth exception trap] Signed-off-by: Amit Daniel Kachhap <amit.kachhap@arm.com> Reviewed-by: Julien Thierry <julien.thierry@arm.com> Cc: Christoffer Dall <christoffer.dall@arm.com> Cc: kvmarm@lists.cs.columbia.edu [maz: various fixups] Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
112 lines
3.6 KiB
C
112 lines
3.6 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/* arch/arm64/include/asm/kvm_ptrauth.h: Guest/host ptrauth save/restore
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* Copyright 2019 Arm Limited
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* Authors: Mark Rutland <mark.rutland@arm.com>
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* Amit Daniel Kachhap <amit.kachhap@arm.com>
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*/
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#ifndef __ASM_KVM_PTRAUTH_H
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#define __ASM_KVM_PTRAUTH_H
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#ifdef __ASSEMBLY__
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#include <asm/sysreg.h>
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#ifdef CONFIG_ARM64_PTR_AUTH
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#define PTRAUTH_REG_OFFSET(x) (x - CPU_APIAKEYLO_EL1)
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/*
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* CPU_AP*_EL1 values exceed immediate offset range (512) for stp
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* instruction so below macros takes CPU_APIAKEYLO_EL1 as base and
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* calculates the offset of the keys from this base to avoid an extra add
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* instruction. These macros assumes the keys offsets follow the order of
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* the sysreg enum in kvm_host.h.
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*/
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.macro ptrauth_save_state base, reg1, reg2
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mrs_s \reg1, SYS_APIAKEYLO_EL1
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mrs_s \reg2, SYS_APIAKEYHI_EL1
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stp \reg1, \reg2, [\base, #PTRAUTH_REG_OFFSET(CPU_APIAKEYLO_EL1)]
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mrs_s \reg1, SYS_APIBKEYLO_EL1
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mrs_s \reg2, SYS_APIBKEYHI_EL1
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stp \reg1, \reg2, [\base, #PTRAUTH_REG_OFFSET(CPU_APIBKEYLO_EL1)]
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mrs_s \reg1, SYS_APDAKEYLO_EL1
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mrs_s \reg2, SYS_APDAKEYHI_EL1
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stp \reg1, \reg2, [\base, #PTRAUTH_REG_OFFSET(CPU_APDAKEYLO_EL1)]
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mrs_s \reg1, SYS_APDBKEYLO_EL1
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mrs_s \reg2, SYS_APDBKEYHI_EL1
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stp \reg1, \reg2, [\base, #PTRAUTH_REG_OFFSET(CPU_APDBKEYLO_EL1)]
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mrs_s \reg1, SYS_APGAKEYLO_EL1
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mrs_s \reg2, SYS_APGAKEYHI_EL1
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stp \reg1, \reg2, [\base, #PTRAUTH_REG_OFFSET(CPU_APGAKEYLO_EL1)]
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.endm
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.macro ptrauth_restore_state base, reg1, reg2
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ldp \reg1, \reg2, [\base, #PTRAUTH_REG_OFFSET(CPU_APIAKEYLO_EL1)]
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msr_s SYS_APIAKEYLO_EL1, \reg1
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msr_s SYS_APIAKEYHI_EL1, \reg2
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ldp \reg1, \reg2, [\base, #PTRAUTH_REG_OFFSET(CPU_APIBKEYLO_EL1)]
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msr_s SYS_APIBKEYLO_EL1, \reg1
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msr_s SYS_APIBKEYHI_EL1, \reg2
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ldp \reg1, \reg2, [\base, #PTRAUTH_REG_OFFSET(CPU_APDAKEYLO_EL1)]
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msr_s SYS_APDAKEYLO_EL1, \reg1
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msr_s SYS_APDAKEYHI_EL1, \reg2
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ldp \reg1, \reg2, [\base, #PTRAUTH_REG_OFFSET(CPU_APDBKEYLO_EL1)]
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msr_s SYS_APDBKEYLO_EL1, \reg1
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msr_s SYS_APDBKEYHI_EL1, \reg2
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ldp \reg1, \reg2, [\base, #PTRAUTH_REG_OFFSET(CPU_APGAKEYLO_EL1)]
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msr_s SYS_APGAKEYLO_EL1, \reg1
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msr_s SYS_APGAKEYHI_EL1, \reg2
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.endm
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/*
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* Both ptrauth_switch_to_guest and ptrauth_switch_to_host macros will
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* check for the presence of one of the cpufeature flag
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* ARM64_HAS_ADDRESS_AUTH_ARCH or ARM64_HAS_ADDRESS_AUTH_IMP_DEF and
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* then proceed ahead with the save/restore of Pointer Authentication
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* key registers.
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*/
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.macro ptrauth_switch_to_guest g_ctxt, reg1, reg2, reg3
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alternative_if ARM64_HAS_ADDRESS_AUTH_ARCH
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b 1000f
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alternative_else_nop_endif
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alternative_if_not ARM64_HAS_ADDRESS_AUTH_IMP_DEF
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b 1001f
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alternative_else_nop_endif
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1000:
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ldr \reg1, [\g_ctxt, #(VCPU_HCR_EL2 - VCPU_CONTEXT)]
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and \reg1, \reg1, #(HCR_API | HCR_APK)
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cbz \reg1, 1001f
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add \reg1, \g_ctxt, #CPU_APIAKEYLO_EL1
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ptrauth_restore_state \reg1, \reg2, \reg3
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1001:
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.endm
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.macro ptrauth_switch_to_host g_ctxt, h_ctxt, reg1, reg2, reg3
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alternative_if ARM64_HAS_ADDRESS_AUTH_ARCH
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b 2000f
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alternative_else_nop_endif
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alternative_if_not ARM64_HAS_ADDRESS_AUTH_IMP_DEF
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b 2001f
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alternative_else_nop_endif
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2000:
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ldr \reg1, [\g_ctxt, #(VCPU_HCR_EL2 - VCPU_CONTEXT)]
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and \reg1, \reg1, #(HCR_API | HCR_APK)
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cbz \reg1, 2001f
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add \reg1, \g_ctxt, #CPU_APIAKEYLO_EL1
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ptrauth_save_state \reg1, \reg2, \reg3
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add \reg1, \h_ctxt, #CPU_APIAKEYLO_EL1
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ptrauth_restore_state \reg1, \reg2, \reg3
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isb
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2001:
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.endm
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#else /* !CONFIG_ARM64_PTR_AUTH */
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.macro ptrauth_switch_to_guest g_ctxt, reg1, reg2, reg3
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.endm
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.macro ptrauth_switch_to_host g_ctxt, h_ctxt, reg1, reg2, reg3
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.endm
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#endif /* CONFIG_ARM64_PTR_AUTH */
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#endif /* __ASSEMBLY__ */
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#endif /* __ASM_KVM_PTRAUTH_H */
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