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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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16466f4284
A wildcard entry with the 32-bits OUI 0x600d8400 was added as part of
the BCM7xxx internal PHY driver, but that entry might match other PHYs
that are not covered by this driver, so let's just remove it.
Fixes: b560a58c45 ("net: phy: add Broadcom BCM7xxx internal PHY driver")
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: David S. Miller <davem@greenl8ke.davemloft.net>
96 lines
3.8 KiB
C
96 lines
3.8 KiB
C
#ifndef _LINUX_BRCMPHY_H
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#define _LINUX_BRCMPHY_H
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#define PHY_ID_BCM50610 0x0143bd60
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#define PHY_ID_BCM50610M 0x0143bd70
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#define PHY_ID_BCM5241 0x0143bc30
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#define PHY_ID_BCMAC131 0x0143bc70
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#define PHY_ID_BCM5481 0x0143bca0
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#define PHY_ID_BCM5482 0x0143bcb0
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#define PHY_ID_BCM5411 0x00206070
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#define PHY_ID_BCM5421 0x002060e0
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#define PHY_ID_BCM5464 0x002060b0
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#define PHY_ID_BCM5461 0x002060c0
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#define PHY_ID_BCM57780 0x03625d90
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#define PHY_ID_BCM7366 0x600d8490
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#define PHY_ID_BCM7439 0x600d8480
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#define PHY_ID_BCM7445 0x600d8510
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#define PHY_BCM_OUI_MASK 0xfffffc00
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#define PHY_BCM_OUI_1 0x00206000
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#define PHY_BCM_OUI_2 0x0143bc00
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#define PHY_BCM_OUI_3 0x03625c00
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#define PHY_BCM_OUI_4 0x600d0000
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#define PHY_BCM_OUI_5 0x03625e00
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#define PHY_BCM_FLAGS_MODE_COPPER 0x00000001
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#define PHY_BCM_FLAGS_MODE_1000BX 0x00000002
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#define PHY_BCM_FLAGS_INTF_SGMII 0x00000010
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#define PHY_BCM_FLAGS_INTF_XAUI 0x00000020
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#define PHY_BRCM_WIRESPEED_ENABLE 0x00000100
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#define PHY_BRCM_AUTO_PWRDWN_ENABLE 0x00000200
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#define PHY_BRCM_RX_REFCLK_UNUSED 0x00000400
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#define PHY_BRCM_STD_IBND_DISABLE 0x00000800
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#define PHY_BRCM_EXT_IBND_RX_ENABLE 0x00001000
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#define PHY_BRCM_EXT_IBND_TX_ENABLE 0x00002000
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#define PHY_BRCM_CLEAR_RGMII_MODE 0x00004000
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#define PHY_BRCM_DIS_TXCRXC_NOENRGY 0x00008000
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/* Broadcom BCM7xxx specific workarounds */
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#define PHY_BRCM_100MBPS_WAR 0x00010000
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#define PHY_BCM_FLAGS_VALID 0x80000000
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/* Broadcom BCM54XX register definitions, common to most Broadcom PHYs */
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#define MII_BCM54XX_ECR 0x10 /* BCM54xx extended control register */
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#define MII_BCM54XX_ECR_IM 0x1000 /* Interrupt mask */
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#define MII_BCM54XX_ECR_IF 0x0800 /* Interrupt force */
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#define MII_BCM54XX_ESR 0x11 /* BCM54xx extended status register */
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#define MII_BCM54XX_ESR_IS 0x1000 /* Interrupt status */
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#define MII_BCM54XX_EXP_DATA 0x15 /* Expansion register data */
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#define MII_BCM54XX_EXP_SEL 0x17 /* Expansion register select */
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#define MII_BCM54XX_EXP_SEL_SSD 0x0e00 /* Secondary SerDes select */
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#define MII_BCM54XX_EXP_SEL_ER 0x0f00 /* Expansion register select */
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#define MII_BCM54XX_AUX_CTL 0x18 /* Auxiliary control register */
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#define MII_BCM54XX_ISR 0x1a /* BCM54xx interrupt status register */
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#define MII_BCM54XX_IMR 0x1b /* BCM54xx interrupt mask register */
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#define MII_BCM54XX_INT_CRCERR 0x0001 /* CRC error */
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#define MII_BCM54XX_INT_LINK 0x0002 /* Link status changed */
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#define MII_BCM54XX_INT_SPEED 0x0004 /* Link speed change */
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#define MII_BCM54XX_INT_DUPLEX 0x0008 /* Duplex mode changed */
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#define MII_BCM54XX_INT_LRS 0x0010 /* Local receiver status changed */
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#define MII_BCM54XX_INT_RRS 0x0020 /* Remote receiver status changed */
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#define MII_BCM54XX_INT_SSERR 0x0040 /* Scrambler synchronization error */
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#define MII_BCM54XX_INT_UHCD 0x0080 /* Unsupported HCD negotiated */
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#define MII_BCM54XX_INT_NHCD 0x0100 /* No HCD */
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#define MII_BCM54XX_INT_NHCDL 0x0200 /* No HCD link */
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#define MII_BCM54XX_INT_ANPR 0x0400 /* Auto-negotiation page received */
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#define MII_BCM54XX_INT_LC 0x0800 /* All counters below 128 */
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#define MII_BCM54XX_INT_HC 0x1000 /* Counter above 32768 */
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#define MII_BCM54XX_INT_MDIX 0x2000 /* MDIX status change */
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#define MII_BCM54XX_INT_PSERR 0x4000 /* Pair swap error */
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#define MII_BCM54XX_SHD 0x1c /* 0x1c shadow registers */
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#define MII_BCM54XX_SHD_WRITE 0x8000
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#define MII_BCM54XX_SHD_VAL(x) ((x & 0x1f) << 10)
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#define MII_BCM54XX_SHD_DATA(x) ((x & 0x3ff) << 0)
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/*
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* AUXILIARY CONTROL SHADOW ACCESS REGISTERS. (PHY REG 0x18)
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*/
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#define MII_BCM54XX_AUXCTL_SHDWSEL_AUXCTL 0x0000
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#define MII_BCM54XX_AUXCTL_ACTL_TX_6DB 0x0400
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#define MII_BCM54XX_AUXCTL_ACTL_SMDSP_ENA 0x0800
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#define MII_BCM54XX_AUXCTL_MISC_WREN 0x8000
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#define MII_BCM54XX_AUXCTL_MISC_FORCE_AMDIX 0x0200
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#define MII_BCM54XX_AUXCTL_MISC_RDSEL_MISC 0x7000
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#define MII_BCM54XX_AUXCTL_SHDWSEL_MISC 0x0007
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#define MII_BCM54XX_AUXCTL_SHDWSEL_AUXCTL 0x0000
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#endif /* _LINUX_BRCMPHY_H */
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