mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-26 19:55:21 +07:00
be32bcbbd1
Move the pm-rcar driver from arch/arm/mach-shmobile/ to drivers/soc/renesas/, and its header file to include/linux/soc/renesas/, so it can be shared between arm32 (R-Car H1 and Gen2) and arm64 (R-Car Gen3). Rename it to rcar-sysc as it's really a driver for the R-Car System Controller (SYSC). Kill the intermediate PM_RCAR config symbol, as it's not user configurable anymore, and to prepare for SoC-specific make rules. Add the missing #include <linux/types.h> to rcar-sysc.h, which was exposed by different include order. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
116 lines
2.7 KiB
C
116 lines
2.7 KiB
C
/*
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* R-Car Generation 2 Power management support
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*
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* Copyright (C) 2013 - 2015 Renesas Electronics Corporation
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* Copyright (C) 2011 Renesas Solutions Corp.
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* Copyright (C) 2011 Magnus Damm
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#include <linux/kernel.h>
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#include <linux/of.h>
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#include <linux/smp.h>
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#include <linux/soc/renesas/rcar-sysc.h>
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#include <asm/io.h>
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#include "common.h"
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#include "rcar-gen2.h"
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/* RST */
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#define RST 0xe6160000
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#define CA15BAR 0x0020
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#define CA7BAR 0x0030
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#define CA15RESCNT 0x0040
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#define CA7RESCNT 0x0044
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/* On-chip RAM */
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#define MERAM 0xe8080000
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#define RAM 0xe6300000
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/* SYSC */
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#define SYSCIER 0x0c
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#define SYSCIMR 0x10
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#if defined(CONFIG_SMP)
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static void __init rcar_gen2_sysc_init(u32 syscier)
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{
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void __iomem *base = rcar_sysc_init(0xe6180000);
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/* enable all interrupt sources, but do not use interrupt handler */
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iowrite32(syscier, base + SYSCIER);
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iowrite32(0, base + SYSCIMR);
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}
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#else /* CONFIG_SMP */
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static inline void rcar_gen2_sysc_init(u32 syscier) {}
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#endif /* CONFIG_SMP */
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void __init rcar_gen2_pm_init(void)
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{
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void __iomem *p;
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u32 bar;
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static int once;
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struct device_node *np, *cpus;
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bool has_a7 = false;
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bool has_a15 = false;
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phys_addr_t boot_vector_addr = 0;
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u32 syscier = 0;
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if (once++)
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return;
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cpus = of_find_node_by_path("/cpus");
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if (!cpus)
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return;
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for_each_child_of_node(cpus, np) {
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if (of_device_is_compatible(np, "arm,cortex-a15"))
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has_a15 = true;
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else if (of_device_is_compatible(np, "arm,cortex-a7"))
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has_a7 = true;
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}
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if (of_machine_is_compatible("renesas,r8a7790")) {
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boot_vector_addr = MERAM;
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syscier = 0x013111ef;
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} else if (of_machine_is_compatible("renesas,r8a7791")) {
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boot_vector_addr = RAM;
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syscier = 0x00111003;
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}
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/* RAM for jump stub, because BAR requires 256KB aligned address */
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p = ioremap_nocache(boot_vector_addr, shmobile_boot_size);
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memcpy_toio(p, shmobile_boot_vector, shmobile_boot_size);
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iounmap(p);
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/* setup reset vectors */
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p = ioremap_nocache(RST, 0x63);
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bar = (boot_vector_addr >> 8) & 0xfffffc00;
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if (has_a15) {
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writel_relaxed(bar, p + CA15BAR);
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writel_relaxed(bar | 0x10, p + CA15BAR);
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/* de-assert reset for CA15 CPUs */
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writel_relaxed((readl_relaxed(p + CA15RESCNT) & ~0x0f) |
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0xa5a50000, p + CA15RESCNT);
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}
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if (has_a7) {
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writel_relaxed(bar, p + CA7BAR);
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writel_relaxed(bar | 0x10, p + CA7BAR);
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/* de-assert reset for CA7 CPUs */
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writel_relaxed((readl_relaxed(p + CA7RESCNT) & ~0x0f) |
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0x5a5a0000, p + CA7RESCNT);
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}
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iounmap(p);
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rcar_gen2_sysc_init(syscier);
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shmobile_smp_apmu_suspend_init();
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}
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