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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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7c0f6ba682
This was entirely automated, using the script by Al: PATT='^[[:blank:]]*#[[:blank:]]*include[[:blank:]]*<asm/uaccess.h>' sed -i -e "s!$PATT!#include <linux/uaccess.h>!" \ $(git grep -l "$PATT"|grep -v ^include/linux/uaccess.h) to do the replacement at the end of the merge window. Requested-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
933 lines
22 KiB
C
933 lines
22 KiB
C
/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 1992 Ross Biro
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* Copyright (C) Linus Torvalds
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* Copyright (C) 1994, 95, 96, 97, 98, 2000 Ralf Baechle
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* Copyright (C) 1996 David S. Miller
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* Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
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* Copyright (C) 1999 MIPS Technologies, Inc.
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* Copyright (C) 2000 Ulf Carlsson
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*
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* At this time Linux/MIPS64 only supports syscall tracing, even for 32-bit
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* binaries.
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*/
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#include <linux/compiler.h>
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#include <linux/context_tracking.h>
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#include <linux/elf.h>
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#include <linux/kernel.h>
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#include <linux/sched.h>
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#include <linux/mm.h>
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#include <linux/errno.h>
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#include <linux/ptrace.h>
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#include <linux/regset.h>
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#include <linux/smp.h>
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#include <linux/security.h>
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#include <linux/stddef.h>
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#include <linux/tracehook.h>
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#include <linux/audit.h>
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#include <linux/seccomp.h>
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#include <linux/ftrace.h>
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#include <asm/byteorder.h>
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#include <asm/cpu.h>
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#include <asm/cpu-info.h>
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#include <asm/dsp.h>
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#include <asm/fpu.h>
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#include <asm/mipsregs.h>
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#include <asm/mipsmtregs.h>
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#include <asm/pgtable.h>
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#include <asm/page.h>
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#include <asm/syscall.h>
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#include <linux/uaccess.h>
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#include <asm/bootinfo.h>
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#include <asm/reg.h>
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#define CREATE_TRACE_POINTS
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#include <trace/events/syscalls.h>
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static void init_fp_ctx(struct task_struct *target)
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{
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/* If FP has been used then the target already has context */
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if (tsk_used_math(target))
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return;
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/* Begin with data registers set to all 1s... */
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memset(&target->thread.fpu.fpr, ~0, sizeof(target->thread.fpu.fpr));
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/* FCSR has been preset by `mips_set_personality_nan'. */
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/*
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* Record that the target has "used" math, such that the context
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* just initialised, and any modifications made by the caller,
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* aren't discarded.
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*/
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set_stopped_child_used_math(target);
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}
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/*
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* Called by kernel/ptrace.c when detaching..
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*
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* Make sure single step bits etc are not set.
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*/
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void ptrace_disable(struct task_struct *child)
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{
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/* Don't load the watchpoint registers for the ex-child. */
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clear_tsk_thread_flag(child, TIF_LOAD_WATCH);
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}
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/*
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* Poke at FCSR according to its mask. Set the Cause bits even
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* if a corresponding Enable bit is set. This will be noticed at
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* the time the thread is switched to and SIGFPE thrown accordingly.
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*/
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static void ptrace_setfcr31(struct task_struct *child, u32 value)
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{
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u32 fcr31;
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u32 mask;
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fcr31 = child->thread.fpu.fcr31;
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mask = boot_cpu_data.fpu_msk31;
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child->thread.fpu.fcr31 = (value & ~mask) | (fcr31 & mask);
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}
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/*
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* Read a general register set. We always use the 64-bit format, even
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* for 32-bit kernels and for 32-bit processes on a 64-bit kernel.
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* Registers are sign extended to fill the available space.
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*/
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int ptrace_getregs(struct task_struct *child, struct user_pt_regs __user *data)
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{
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struct pt_regs *regs;
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int i;
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if (!access_ok(VERIFY_WRITE, data, 38 * 8))
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return -EIO;
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regs = task_pt_regs(child);
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for (i = 0; i < 32; i++)
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__put_user((long)regs->regs[i], (__s64 __user *)&data->regs[i]);
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__put_user((long)regs->lo, (__s64 __user *)&data->lo);
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__put_user((long)regs->hi, (__s64 __user *)&data->hi);
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__put_user((long)regs->cp0_epc, (__s64 __user *)&data->cp0_epc);
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__put_user((long)regs->cp0_badvaddr, (__s64 __user *)&data->cp0_badvaddr);
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__put_user((long)regs->cp0_status, (__s64 __user *)&data->cp0_status);
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__put_user((long)regs->cp0_cause, (__s64 __user *)&data->cp0_cause);
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return 0;
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}
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/*
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* Write a general register set. As for PTRACE_GETREGS, we always use
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* the 64-bit format. On a 32-bit kernel only the lower order half
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* (according to endianness) will be used.
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*/
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int ptrace_setregs(struct task_struct *child, struct user_pt_regs __user *data)
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{
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struct pt_regs *regs;
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int i;
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if (!access_ok(VERIFY_READ, data, 38 * 8))
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return -EIO;
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regs = task_pt_regs(child);
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for (i = 0; i < 32; i++)
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__get_user(regs->regs[i], (__s64 __user *)&data->regs[i]);
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__get_user(regs->lo, (__s64 __user *)&data->lo);
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__get_user(regs->hi, (__s64 __user *)&data->hi);
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__get_user(regs->cp0_epc, (__s64 __user *)&data->cp0_epc);
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/* badvaddr, status, and cause may not be written. */
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return 0;
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}
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int ptrace_getfpregs(struct task_struct *child, __u32 __user *data)
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{
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int i;
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if (!access_ok(VERIFY_WRITE, data, 33 * 8))
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return -EIO;
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if (tsk_used_math(child)) {
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union fpureg *fregs = get_fpu_regs(child);
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for (i = 0; i < 32; i++)
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__put_user(get_fpr64(&fregs[i], 0),
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i + (__u64 __user *)data);
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} else {
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for (i = 0; i < 32; i++)
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__put_user((__u64) -1, i + (__u64 __user *) data);
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}
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__put_user(child->thread.fpu.fcr31, data + 64);
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__put_user(boot_cpu_data.fpu_id, data + 65);
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return 0;
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}
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int ptrace_setfpregs(struct task_struct *child, __u32 __user *data)
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{
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union fpureg *fregs;
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u64 fpr_val;
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u32 value;
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int i;
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if (!access_ok(VERIFY_READ, data, 33 * 8))
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return -EIO;
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init_fp_ctx(child);
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fregs = get_fpu_regs(child);
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for (i = 0; i < 32; i++) {
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__get_user(fpr_val, i + (__u64 __user *)data);
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set_fpr64(&fregs[i], 0, fpr_val);
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}
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__get_user(value, data + 64);
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ptrace_setfcr31(child, value);
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/* FIR may not be written. */
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return 0;
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}
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int ptrace_get_watch_regs(struct task_struct *child,
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struct pt_watch_regs __user *addr)
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{
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enum pt_watch_style style;
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int i;
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if (!cpu_has_watch || boot_cpu_data.watch_reg_use_cnt == 0)
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return -EIO;
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if (!access_ok(VERIFY_WRITE, addr, sizeof(struct pt_watch_regs)))
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return -EIO;
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#ifdef CONFIG_32BIT
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style = pt_watch_style_mips32;
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#define WATCH_STYLE mips32
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#else
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style = pt_watch_style_mips64;
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#define WATCH_STYLE mips64
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#endif
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__put_user(style, &addr->style);
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__put_user(boot_cpu_data.watch_reg_use_cnt,
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&addr->WATCH_STYLE.num_valid);
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for (i = 0; i < boot_cpu_data.watch_reg_use_cnt; i++) {
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__put_user(child->thread.watch.mips3264.watchlo[i],
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&addr->WATCH_STYLE.watchlo[i]);
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__put_user(child->thread.watch.mips3264.watchhi[i] &
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(MIPS_WATCHHI_MASK | MIPS_WATCHHI_IRW),
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&addr->WATCH_STYLE.watchhi[i]);
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__put_user(boot_cpu_data.watch_reg_masks[i],
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&addr->WATCH_STYLE.watch_masks[i]);
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}
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for (; i < 8; i++) {
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__put_user(0, &addr->WATCH_STYLE.watchlo[i]);
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__put_user(0, &addr->WATCH_STYLE.watchhi[i]);
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__put_user(0, &addr->WATCH_STYLE.watch_masks[i]);
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}
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return 0;
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}
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int ptrace_set_watch_regs(struct task_struct *child,
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struct pt_watch_regs __user *addr)
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{
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int i;
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int watch_active = 0;
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unsigned long lt[NUM_WATCH_REGS];
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u16 ht[NUM_WATCH_REGS];
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if (!cpu_has_watch || boot_cpu_data.watch_reg_use_cnt == 0)
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return -EIO;
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if (!access_ok(VERIFY_READ, addr, sizeof(struct pt_watch_regs)))
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return -EIO;
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/* Check the values. */
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for (i = 0; i < boot_cpu_data.watch_reg_use_cnt; i++) {
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__get_user(lt[i], &addr->WATCH_STYLE.watchlo[i]);
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#ifdef CONFIG_32BIT
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if (lt[i] & __UA_LIMIT)
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return -EINVAL;
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#else
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if (test_tsk_thread_flag(child, TIF_32BIT_ADDR)) {
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if (lt[i] & 0xffffffff80000000UL)
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return -EINVAL;
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} else {
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if (lt[i] & __UA_LIMIT)
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return -EINVAL;
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}
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#endif
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__get_user(ht[i], &addr->WATCH_STYLE.watchhi[i]);
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if (ht[i] & ~MIPS_WATCHHI_MASK)
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return -EINVAL;
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}
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/* Install them. */
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for (i = 0; i < boot_cpu_data.watch_reg_use_cnt; i++) {
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if (lt[i] & MIPS_WATCHLO_IRW)
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watch_active = 1;
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child->thread.watch.mips3264.watchlo[i] = lt[i];
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/* Set the G bit. */
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child->thread.watch.mips3264.watchhi[i] = ht[i];
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}
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if (watch_active)
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set_tsk_thread_flag(child, TIF_LOAD_WATCH);
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else
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clear_tsk_thread_flag(child, TIF_LOAD_WATCH);
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return 0;
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}
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/* regset get/set implementations */
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#if defined(CONFIG_32BIT) || defined(CONFIG_MIPS32_O32)
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static int gpr32_get(struct task_struct *target,
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const struct user_regset *regset,
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unsigned int pos, unsigned int count,
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void *kbuf, void __user *ubuf)
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{
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struct pt_regs *regs = task_pt_regs(target);
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u32 uregs[ELF_NGREG] = {};
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unsigned i;
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for (i = MIPS32_EF_R1; i <= MIPS32_EF_R31; i++) {
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/* k0/k1 are copied as zero. */
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if (i == MIPS32_EF_R26 || i == MIPS32_EF_R27)
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continue;
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uregs[i] = regs->regs[i - MIPS32_EF_R0];
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}
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uregs[MIPS32_EF_LO] = regs->lo;
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uregs[MIPS32_EF_HI] = regs->hi;
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uregs[MIPS32_EF_CP0_EPC] = regs->cp0_epc;
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uregs[MIPS32_EF_CP0_BADVADDR] = regs->cp0_badvaddr;
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uregs[MIPS32_EF_CP0_STATUS] = regs->cp0_status;
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uregs[MIPS32_EF_CP0_CAUSE] = regs->cp0_cause;
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return user_regset_copyout(&pos, &count, &kbuf, &ubuf, uregs, 0,
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sizeof(uregs));
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}
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static int gpr32_set(struct task_struct *target,
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const struct user_regset *regset,
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unsigned int pos, unsigned int count,
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const void *kbuf, const void __user *ubuf)
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{
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struct pt_regs *regs = task_pt_regs(target);
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u32 uregs[ELF_NGREG];
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unsigned start, num_regs, i;
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int err;
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start = pos / sizeof(u32);
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num_regs = count / sizeof(u32);
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if (start + num_regs > ELF_NGREG)
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return -EIO;
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err = user_regset_copyin(&pos, &count, &kbuf, &ubuf, uregs, 0,
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sizeof(uregs));
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if (err)
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return err;
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for (i = start; i < num_regs; i++) {
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/*
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* Cast all values to signed here so that if this is a 64-bit
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* kernel, the supplied 32-bit values will be sign extended.
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*/
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switch (i) {
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case MIPS32_EF_R1 ... MIPS32_EF_R25:
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/* k0/k1 are ignored. */
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case MIPS32_EF_R28 ... MIPS32_EF_R31:
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regs->regs[i - MIPS32_EF_R0] = (s32)uregs[i];
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break;
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case MIPS32_EF_LO:
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regs->lo = (s32)uregs[i];
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break;
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case MIPS32_EF_HI:
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regs->hi = (s32)uregs[i];
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break;
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case MIPS32_EF_CP0_EPC:
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regs->cp0_epc = (s32)uregs[i];
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break;
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}
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}
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return 0;
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}
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#endif /* CONFIG_32BIT || CONFIG_MIPS32_O32 */
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#ifdef CONFIG_64BIT
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static int gpr64_get(struct task_struct *target,
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const struct user_regset *regset,
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unsigned int pos, unsigned int count,
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void *kbuf, void __user *ubuf)
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{
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struct pt_regs *regs = task_pt_regs(target);
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u64 uregs[ELF_NGREG] = {};
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unsigned i;
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for (i = MIPS64_EF_R1; i <= MIPS64_EF_R31; i++) {
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/* k0/k1 are copied as zero. */
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if (i == MIPS64_EF_R26 || i == MIPS64_EF_R27)
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continue;
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uregs[i] = regs->regs[i - MIPS64_EF_R0];
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}
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uregs[MIPS64_EF_LO] = regs->lo;
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uregs[MIPS64_EF_HI] = regs->hi;
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uregs[MIPS64_EF_CP0_EPC] = regs->cp0_epc;
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uregs[MIPS64_EF_CP0_BADVADDR] = regs->cp0_badvaddr;
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uregs[MIPS64_EF_CP0_STATUS] = regs->cp0_status;
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uregs[MIPS64_EF_CP0_CAUSE] = regs->cp0_cause;
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return user_regset_copyout(&pos, &count, &kbuf, &ubuf, uregs, 0,
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sizeof(uregs));
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}
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static int gpr64_set(struct task_struct *target,
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const struct user_regset *regset,
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unsigned int pos, unsigned int count,
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const void *kbuf, const void __user *ubuf)
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{
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struct pt_regs *regs = task_pt_regs(target);
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u64 uregs[ELF_NGREG];
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unsigned start, num_regs, i;
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int err;
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start = pos / sizeof(u64);
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num_regs = count / sizeof(u64);
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if (start + num_regs > ELF_NGREG)
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return -EIO;
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err = user_regset_copyin(&pos, &count, &kbuf, &ubuf, uregs, 0,
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sizeof(uregs));
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if (err)
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return err;
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for (i = start; i < num_regs; i++) {
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switch (i) {
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case MIPS64_EF_R1 ... MIPS64_EF_R25:
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/* k0/k1 are ignored. */
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case MIPS64_EF_R28 ... MIPS64_EF_R31:
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regs->regs[i - MIPS64_EF_R0] = uregs[i];
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break;
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case MIPS64_EF_LO:
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regs->lo = uregs[i];
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break;
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case MIPS64_EF_HI:
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regs->hi = uregs[i];
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break;
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case MIPS64_EF_CP0_EPC:
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regs->cp0_epc = uregs[i];
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break;
|
|
}
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|
}
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|
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return 0;
|
|
}
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|
|
#endif /* CONFIG_64BIT */
|
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|
|
static int fpr_get(struct task_struct *target,
|
|
const struct user_regset *regset,
|
|
unsigned int pos, unsigned int count,
|
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void *kbuf, void __user *ubuf)
|
|
{
|
|
unsigned i;
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int err;
|
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u64 fpr_val;
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|
|
/* XXX fcr31 */
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if (sizeof(target->thread.fpu.fpr[i]) == sizeof(elf_fpreg_t))
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return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
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&target->thread.fpu,
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0, sizeof(elf_fpregset_t));
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|
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for (i = 0; i < NUM_FPU_REGS; i++) {
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fpr_val = get_fpr64(&target->thread.fpu.fpr[i], 0);
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err = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
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&fpr_val, i * sizeof(elf_fpreg_t),
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(i + 1) * sizeof(elf_fpreg_t));
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|
if (err)
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return err;
|
|
}
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|
|
return 0;
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|
}
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|
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static int fpr_set(struct task_struct *target,
|
|
const struct user_regset *regset,
|
|
unsigned int pos, unsigned int count,
|
|
const void *kbuf, const void __user *ubuf)
|
|
{
|
|
unsigned i;
|
|
int err;
|
|
u64 fpr_val;
|
|
|
|
/* XXX fcr31 */
|
|
|
|
init_fp_ctx(target);
|
|
|
|
if (sizeof(target->thread.fpu.fpr[i]) == sizeof(elf_fpreg_t))
|
|
return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
|
|
&target->thread.fpu,
|
|
0, sizeof(elf_fpregset_t));
|
|
|
|
for (i = 0; i < NUM_FPU_REGS; i++) {
|
|
err = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
|
|
&fpr_val, i * sizeof(elf_fpreg_t),
|
|
(i + 1) * sizeof(elf_fpreg_t));
|
|
if (err)
|
|
return err;
|
|
set_fpr64(&target->thread.fpu.fpr[i], 0, fpr_val);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
enum mips_regset {
|
|
REGSET_GPR,
|
|
REGSET_FPR,
|
|
};
|
|
|
|
struct pt_regs_offset {
|
|
const char *name;
|
|
int offset;
|
|
};
|
|
|
|
#define REG_OFFSET_NAME(reg, r) { \
|
|
.name = #reg, \
|
|
.offset = offsetof(struct pt_regs, r) \
|
|
}
|
|
|
|
#define REG_OFFSET_END { \
|
|
.name = NULL, \
|
|
.offset = 0 \
|
|
}
|
|
|
|
static const struct pt_regs_offset regoffset_table[] = {
|
|
REG_OFFSET_NAME(r0, regs[0]),
|
|
REG_OFFSET_NAME(r1, regs[1]),
|
|
REG_OFFSET_NAME(r2, regs[2]),
|
|
REG_OFFSET_NAME(r3, regs[3]),
|
|
REG_OFFSET_NAME(r4, regs[4]),
|
|
REG_OFFSET_NAME(r5, regs[5]),
|
|
REG_OFFSET_NAME(r6, regs[6]),
|
|
REG_OFFSET_NAME(r7, regs[7]),
|
|
REG_OFFSET_NAME(r8, regs[8]),
|
|
REG_OFFSET_NAME(r9, regs[9]),
|
|
REG_OFFSET_NAME(r10, regs[10]),
|
|
REG_OFFSET_NAME(r11, regs[11]),
|
|
REG_OFFSET_NAME(r12, regs[12]),
|
|
REG_OFFSET_NAME(r13, regs[13]),
|
|
REG_OFFSET_NAME(r14, regs[14]),
|
|
REG_OFFSET_NAME(r15, regs[15]),
|
|
REG_OFFSET_NAME(r16, regs[16]),
|
|
REG_OFFSET_NAME(r17, regs[17]),
|
|
REG_OFFSET_NAME(r18, regs[18]),
|
|
REG_OFFSET_NAME(r19, regs[19]),
|
|
REG_OFFSET_NAME(r20, regs[20]),
|
|
REG_OFFSET_NAME(r21, regs[21]),
|
|
REG_OFFSET_NAME(r22, regs[22]),
|
|
REG_OFFSET_NAME(r23, regs[23]),
|
|
REG_OFFSET_NAME(r24, regs[24]),
|
|
REG_OFFSET_NAME(r25, regs[25]),
|
|
REG_OFFSET_NAME(r26, regs[26]),
|
|
REG_OFFSET_NAME(r27, regs[27]),
|
|
REG_OFFSET_NAME(r28, regs[28]),
|
|
REG_OFFSET_NAME(r29, regs[29]),
|
|
REG_OFFSET_NAME(r30, regs[30]),
|
|
REG_OFFSET_NAME(r31, regs[31]),
|
|
REG_OFFSET_NAME(c0_status, cp0_status),
|
|
REG_OFFSET_NAME(hi, hi),
|
|
REG_OFFSET_NAME(lo, lo),
|
|
#ifdef CONFIG_CPU_HAS_SMARTMIPS
|
|
REG_OFFSET_NAME(acx, acx),
|
|
#endif
|
|
REG_OFFSET_NAME(c0_badvaddr, cp0_badvaddr),
|
|
REG_OFFSET_NAME(c0_cause, cp0_cause),
|
|
REG_OFFSET_NAME(c0_epc, cp0_epc),
|
|
#ifdef CONFIG_CPU_CAVIUM_OCTEON
|
|
REG_OFFSET_NAME(mpl0, mpl[0]),
|
|
REG_OFFSET_NAME(mpl1, mpl[1]),
|
|
REG_OFFSET_NAME(mpl2, mpl[2]),
|
|
REG_OFFSET_NAME(mtp0, mtp[0]),
|
|
REG_OFFSET_NAME(mtp1, mtp[1]),
|
|
REG_OFFSET_NAME(mtp2, mtp[2]),
|
|
#endif
|
|
REG_OFFSET_END,
|
|
};
|
|
|
|
/**
|
|
* regs_query_register_offset() - query register offset from its name
|
|
* @name: the name of a register
|
|
*
|
|
* regs_query_register_offset() returns the offset of a register in struct
|
|
* pt_regs from its name. If the name is invalid, this returns -EINVAL;
|
|
*/
|
|
int regs_query_register_offset(const char *name)
|
|
{
|
|
const struct pt_regs_offset *roff;
|
|
for (roff = regoffset_table; roff->name != NULL; roff++)
|
|
if (!strcmp(roff->name, name))
|
|
return roff->offset;
|
|
return -EINVAL;
|
|
}
|
|
|
|
#if defined(CONFIG_32BIT) || defined(CONFIG_MIPS32_O32)
|
|
|
|
static const struct user_regset mips_regsets[] = {
|
|
[REGSET_GPR] = {
|
|
.core_note_type = NT_PRSTATUS,
|
|
.n = ELF_NGREG,
|
|
.size = sizeof(unsigned int),
|
|
.align = sizeof(unsigned int),
|
|
.get = gpr32_get,
|
|
.set = gpr32_set,
|
|
},
|
|
[REGSET_FPR] = {
|
|
.core_note_type = NT_PRFPREG,
|
|
.n = ELF_NFPREG,
|
|
.size = sizeof(elf_fpreg_t),
|
|
.align = sizeof(elf_fpreg_t),
|
|
.get = fpr_get,
|
|
.set = fpr_set,
|
|
},
|
|
};
|
|
|
|
static const struct user_regset_view user_mips_view = {
|
|
.name = "mips",
|
|
.e_machine = ELF_ARCH,
|
|
.ei_osabi = ELF_OSABI,
|
|
.regsets = mips_regsets,
|
|
.n = ARRAY_SIZE(mips_regsets),
|
|
};
|
|
|
|
#endif /* CONFIG_32BIT || CONFIG_MIPS32_O32 */
|
|
|
|
#ifdef CONFIG_64BIT
|
|
|
|
static const struct user_regset mips64_regsets[] = {
|
|
[REGSET_GPR] = {
|
|
.core_note_type = NT_PRSTATUS,
|
|
.n = ELF_NGREG,
|
|
.size = sizeof(unsigned long),
|
|
.align = sizeof(unsigned long),
|
|
.get = gpr64_get,
|
|
.set = gpr64_set,
|
|
},
|
|
[REGSET_FPR] = {
|
|
.core_note_type = NT_PRFPREG,
|
|
.n = ELF_NFPREG,
|
|
.size = sizeof(elf_fpreg_t),
|
|
.align = sizeof(elf_fpreg_t),
|
|
.get = fpr_get,
|
|
.set = fpr_set,
|
|
},
|
|
};
|
|
|
|
static const struct user_regset_view user_mips64_view = {
|
|
.name = "mips64",
|
|
.e_machine = ELF_ARCH,
|
|
.ei_osabi = ELF_OSABI,
|
|
.regsets = mips64_regsets,
|
|
.n = ARRAY_SIZE(mips64_regsets),
|
|
};
|
|
|
|
#endif /* CONFIG_64BIT */
|
|
|
|
const struct user_regset_view *task_user_regset_view(struct task_struct *task)
|
|
{
|
|
#ifdef CONFIG_32BIT
|
|
return &user_mips_view;
|
|
#else
|
|
#ifdef CONFIG_MIPS32_O32
|
|
if (test_tsk_thread_flag(task, TIF_32BIT_REGS))
|
|
return &user_mips_view;
|
|
#endif
|
|
return &user_mips64_view;
|
|
#endif
|
|
}
|
|
|
|
long arch_ptrace(struct task_struct *child, long request,
|
|
unsigned long addr, unsigned long data)
|
|
{
|
|
int ret;
|
|
void __user *addrp = (void __user *) addr;
|
|
void __user *datavp = (void __user *) data;
|
|
unsigned long __user *datalp = (void __user *) data;
|
|
|
|
switch (request) {
|
|
/* when I and D space are separate, these will need to be fixed. */
|
|
case PTRACE_PEEKTEXT: /* read word at location addr. */
|
|
case PTRACE_PEEKDATA:
|
|
ret = generic_ptrace_peekdata(child, addr, data);
|
|
break;
|
|
|
|
/* Read the word at location addr in the USER area. */
|
|
case PTRACE_PEEKUSR: {
|
|
struct pt_regs *regs;
|
|
union fpureg *fregs;
|
|
unsigned long tmp = 0;
|
|
|
|
regs = task_pt_regs(child);
|
|
ret = 0; /* Default return value. */
|
|
|
|
switch (addr) {
|
|
case 0 ... 31:
|
|
tmp = regs->regs[addr];
|
|
break;
|
|
case FPR_BASE ... FPR_BASE + 31:
|
|
if (!tsk_used_math(child)) {
|
|
/* FP not yet used */
|
|
tmp = -1;
|
|
break;
|
|
}
|
|
fregs = get_fpu_regs(child);
|
|
|
|
#ifdef CONFIG_32BIT
|
|
if (test_thread_flag(TIF_32BIT_FPREGS)) {
|
|
/*
|
|
* The odd registers are actually the high
|
|
* order bits of the values stored in the even
|
|
* registers - unless we're using r2k_switch.S.
|
|
*/
|
|
tmp = get_fpr32(&fregs[(addr & ~1) - FPR_BASE],
|
|
addr & 1);
|
|
break;
|
|
}
|
|
#endif
|
|
tmp = get_fpr32(&fregs[addr - FPR_BASE], 0);
|
|
break;
|
|
case PC:
|
|
tmp = regs->cp0_epc;
|
|
break;
|
|
case CAUSE:
|
|
tmp = regs->cp0_cause;
|
|
break;
|
|
case BADVADDR:
|
|
tmp = regs->cp0_badvaddr;
|
|
break;
|
|
case MMHI:
|
|
tmp = regs->hi;
|
|
break;
|
|
case MMLO:
|
|
tmp = regs->lo;
|
|
break;
|
|
#ifdef CONFIG_CPU_HAS_SMARTMIPS
|
|
case ACX:
|
|
tmp = regs->acx;
|
|
break;
|
|
#endif
|
|
case FPC_CSR:
|
|
tmp = child->thread.fpu.fcr31;
|
|
break;
|
|
case FPC_EIR:
|
|
/* implementation / version register */
|
|
tmp = boot_cpu_data.fpu_id;
|
|
break;
|
|
case DSP_BASE ... DSP_BASE + 5: {
|
|
dspreg_t *dregs;
|
|
|
|
if (!cpu_has_dsp) {
|
|
tmp = 0;
|
|
ret = -EIO;
|
|
goto out;
|
|
}
|
|
dregs = __get_dsp_regs(child);
|
|
tmp = (unsigned long) (dregs[addr - DSP_BASE]);
|
|
break;
|
|
}
|
|
case DSP_CONTROL:
|
|
if (!cpu_has_dsp) {
|
|
tmp = 0;
|
|
ret = -EIO;
|
|
goto out;
|
|
}
|
|
tmp = child->thread.dsp.dspcontrol;
|
|
break;
|
|
default:
|
|
tmp = 0;
|
|
ret = -EIO;
|
|
goto out;
|
|
}
|
|
ret = put_user(tmp, datalp);
|
|
break;
|
|
}
|
|
|
|
/* when I and D space are separate, this will have to be fixed. */
|
|
case PTRACE_POKETEXT: /* write the word at location addr. */
|
|
case PTRACE_POKEDATA:
|
|
ret = generic_ptrace_pokedata(child, addr, data);
|
|
break;
|
|
|
|
case PTRACE_POKEUSR: {
|
|
struct pt_regs *regs;
|
|
ret = 0;
|
|
regs = task_pt_regs(child);
|
|
|
|
switch (addr) {
|
|
case 0 ... 31:
|
|
regs->regs[addr] = data;
|
|
break;
|
|
case FPR_BASE ... FPR_BASE + 31: {
|
|
union fpureg *fregs = get_fpu_regs(child);
|
|
|
|
init_fp_ctx(child);
|
|
#ifdef CONFIG_32BIT
|
|
if (test_thread_flag(TIF_32BIT_FPREGS)) {
|
|
/*
|
|
* The odd registers are actually the high
|
|
* order bits of the values stored in the even
|
|
* registers - unless we're using r2k_switch.S.
|
|
*/
|
|
set_fpr32(&fregs[(addr & ~1) - FPR_BASE],
|
|
addr & 1, data);
|
|
break;
|
|
}
|
|
#endif
|
|
set_fpr64(&fregs[addr - FPR_BASE], 0, data);
|
|
break;
|
|
}
|
|
case PC:
|
|
regs->cp0_epc = data;
|
|
break;
|
|
case MMHI:
|
|
regs->hi = data;
|
|
break;
|
|
case MMLO:
|
|
regs->lo = data;
|
|
break;
|
|
#ifdef CONFIG_CPU_HAS_SMARTMIPS
|
|
case ACX:
|
|
regs->acx = data;
|
|
break;
|
|
#endif
|
|
case FPC_CSR:
|
|
init_fp_ctx(child);
|
|
ptrace_setfcr31(child, data);
|
|
break;
|
|
case DSP_BASE ... DSP_BASE + 5: {
|
|
dspreg_t *dregs;
|
|
|
|
if (!cpu_has_dsp) {
|
|
ret = -EIO;
|
|
break;
|
|
}
|
|
|
|
dregs = __get_dsp_regs(child);
|
|
dregs[addr - DSP_BASE] = data;
|
|
break;
|
|
}
|
|
case DSP_CONTROL:
|
|
if (!cpu_has_dsp) {
|
|
ret = -EIO;
|
|
break;
|
|
}
|
|
child->thread.dsp.dspcontrol = data;
|
|
break;
|
|
default:
|
|
/* The rest are not allowed. */
|
|
ret = -EIO;
|
|
break;
|
|
}
|
|
break;
|
|
}
|
|
|
|
case PTRACE_GETREGS:
|
|
ret = ptrace_getregs(child, datavp);
|
|
break;
|
|
|
|
case PTRACE_SETREGS:
|
|
ret = ptrace_setregs(child, datavp);
|
|
break;
|
|
|
|
case PTRACE_GETFPREGS:
|
|
ret = ptrace_getfpregs(child, datavp);
|
|
break;
|
|
|
|
case PTRACE_SETFPREGS:
|
|
ret = ptrace_setfpregs(child, datavp);
|
|
break;
|
|
|
|
case PTRACE_GET_THREAD_AREA:
|
|
ret = put_user(task_thread_info(child)->tp_value, datalp);
|
|
break;
|
|
|
|
case PTRACE_GET_WATCH_REGS:
|
|
ret = ptrace_get_watch_regs(child, addrp);
|
|
break;
|
|
|
|
case PTRACE_SET_WATCH_REGS:
|
|
ret = ptrace_set_watch_regs(child, addrp);
|
|
break;
|
|
|
|
default:
|
|
ret = ptrace_request(child, request, addr, data);
|
|
break;
|
|
}
|
|
out:
|
|
return ret;
|
|
}
|
|
|
|
/*
|
|
* Notification of system call entry/exit
|
|
* - triggered by current->work.syscall_trace
|
|
*/
|
|
asmlinkage long syscall_trace_enter(struct pt_regs *regs, long syscall)
|
|
{
|
|
user_exit();
|
|
|
|
current_thread_info()->syscall = syscall;
|
|
|
|
if (test_thread_flag(TIF_SYSCALL_TRACE) &&
|
|
tracehook_report_syscall_entry(regs))
|
|
return -1;
|
|
|
|
if (secure_computing(NULL) == -1)
|
|
return -1;
|
|
|
|
if (unlikely(test_thread_flag(TIF_SYSCALL_TRACEPOINT)))
|
|
trace_sys_enter(regs, regs->regs[2]);
|
|
|
|
audit_syscall_entry(syscall, regs->regs[4], regs->regs[5],
|
|
regs->regs[6], regs->regs[7]);
|
|
return syscall;
|
|
}
|
|
|
|
/*
|
|
* Notification of system call entry/exit
|
|
* - triggered by current->work.syscall_trace
|
|
*/
|
|
asmlinkage void syscall_trace_leave(struct pt_regs *regs)
|
|
{
|
|
/*
|
|
* We may come here right after calling schedule_user()
|
|
* or do_notify_resume(), in which case we can be in RCU
|
|
* user mode.
|
|
*/
|
|
user_exit();
|
|
|
|
audit_syscall_exit(regs);
|
|
|
|
if (unlikely(test_thread_flag(TIF_SYSCALL_TRACEPOINT)))
|
|
trace_sys_exit(regs, regs->regs[2]);
|
|
|
|
if (test_thread_flag(TIF_SYSCALL_TRACE))
|
|
tracehook_report_syscall_exit(regs, 0);
|
|
|
|
user_enter();
|
|
}
|