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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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a619e59c07
Instead of comparing the whole CPU mask every time, let's keep a counter of how many bits are set in the mask. Thus testing for a local mm only requires testing if that counter is 1 and the current CPU bit is set in the mask. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
101 lines
2.5 KiB
C
101 lines
2.5 KiB
C
/*
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* TLB shootdown specifics for powerpc
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*
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* Copyright (C) 2002 Anton Blanchard, IBM Corp.
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* Copyright (C) 2002 Paul Mackerras, IBM Corp.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#ifndef _ASM_POWERPC_TLB_H
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#define _ASM_POWERPC_TLB_H
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#ifdef __KERNEL__
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#ifndef __powerpc64__
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#include <asm/pgtable.h>
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#endif
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#include <asm/pgalloc.h>
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#include <asm/tlbflush.h>
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#ifndef __powerpc64__
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#include <asm/page.h>
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#include <asm/mmu.h>
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#endif
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#include <linux/pagemap.h>
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#define tlb_start_vma(tlb, vma) do { } while (0)
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#define tlb_end_vma(tlb, vma) do { } while (0)
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#define __tlb_remove_tlb_entry __tlb_remove_tlb_entry
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#define tlb_remove_check_page_size_change tlb_remove_check_page_size_change
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extern void tlb_flush(struct mmu_gather *tlb);
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/* Get the generic bits... */
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#include <asm-generic/tlb.h>
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extern void flush_hash_entry(struct mm_struct *mm, pte_t *ptep,
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unsigned long address);
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static inline void __tlb_remove_tlb_entry(struct mmu_gather *tlb, pte_t *ptep,
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unsigned long address)
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{
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#ifdef CONFIG_PPC_STD_MMU_32
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if (pte_val(*ptep) & _PAGE_HASHPTE)
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flush_hash_entry(tlb->mm, ptep, address);
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#endif
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}
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static inline void tlb_remove_check_page_size_change(struct mmu_gather *tlb,
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unsigned int page_size)
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{
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if (!tlb->page_size)
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tlb->page_size = page_size;
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else if (tlb->page_size != page_size) {
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tlb_flush_mmu(tlb);
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/*
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* update the page size after flush for the new
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* mmu_gather.
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*/
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tlb->page_size = page_size;
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}
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}
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#ifdef CONFIG_SMP
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static inline int mm_is_core_local(struct mm_struct *mm)
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{
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return cpumask_subset(mm_cpumask(mm),
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topology_sibling_cpumask(smp_processor_id()));
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}
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#ifdef CONFIG_PPC_BOOK3S_64
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static inline int mm_is_thread_local(struct mm_struct *mm)
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{
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if (atomic_read(&mm->context.active_cpus) > 1)
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return false;
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return cpumask_test_cpu(smp_processor_id(), mm_cpumask(mm));
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}
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#else /* CONFIG_PPC_BOOK3S_64 */
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static inline int mm_is_thread_local(struct mm_struct *mm)
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{
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return cpumask_equal(mm_cpumask(mm),
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cpumask_of(smp_processor_id()));
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}
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#endif /* !CONFIG_PPC_BOOK3S_64 */
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#else /* CONFIG_SMP */
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static inline int mm_is_core_local(struct mm_struct *mm)
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{
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return 1;
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}
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static inline int mm_is_thread_local(struct mm_struct *mm)
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{
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return 1;
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}
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#endif
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#endif /* __KERNEL__ */
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#endif /* __ASM_POWERPC_TLB_H */
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