mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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b24413180f
Many source files in the tree are missing licensing information, which makes it harder for compliance tools to determine the correct license. By default all files without license information are under the default license of the kernel, which is GPL version 2. Update the files which contain no license information with the 'GPL-2.0' SPDX license identifier. The SPDX identifier is a legally binding shorthand, which can be used instead of the full boiler plate text. This patch is based on work done by Thomas Gleixner and Kate Stewart and Philippe Ombredanne. How this work was done: Patches were generated and checked against linux-4.14-rc6 for a subset of the use cases: - file had no licensing information it it. - file was a */uapi/* one with no licensing information in it, - file was a */uapi/* one with existing licensing information, Further patches will be generated in subsequent months to fix up cases where non-standard license headers were used, and references to license had to be inferred by heuristics based on keywords. The analysis to determine which SPDX License Identifier to be applied to a file was done in a spreadsheet of side by side results from of the output of two independent scanners (ScanCode & Windriver) producing SPDX tag:value files created by Philippe Ombredanne. Philippe prepared the base worksheet, and did an initial spot review of a few 1000 files. The 4.13 kernel was the starting point of the analysis with 60,537 files assessed. Kate Stewart did a file by file comparison of the scanner results in the spreadsheet to determine which SPDX license identifier(s) to be applied to the file. She confirmed any determination that was not immediately clear with lawyers working with the Linux Foundation. Criteria used to select files for SPDX license identifier tagging was: - Files considered eligible had to be source code files. - Make and config files were included as candidates if they contained >5 lines of source - File already had some variant of a license header in it (even if <5 lines). All documentation files were explicitly excluded. The following heuristics were used to determine which SPDX license identifiers to apply. - when both scanners couldn't find any license traces, file was considered to have no license information in it, and the top level COPYING file license applied. For non */uapi/* files that summary was: SPDX license identifier # files ---------------------------------------------------|------- GPL-2.0 11139 and resulted in the first patch in this series. If that file was a */uapi/* path one, it was "GPL-2.0 WITH Linux-syscall-note" otherwise it was "GPL-2.0". Results of that was: SPDX license identifier # files ---------------------------------------------------|------- GPL-2.0 WITH Linux-syscall-note 930 and resulted in the second patch in this series. - if a file had some form of licensing information in it, and was one of the */uapi/* ones, it was denoted with the Linux-syscall-note if any GPL family license was found in the file or had no licensing in it (per prior point). Results summary: SPDX license identifier # files ---------------------------------------------------|------ GPL-2.0 WITH Linux-syscall-note 270 GPL-2.0+ WITH Linux-syscall-note 169 ((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) 21 ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) 17 LGPL-2.1+ WITH Linux-syscall-note 15 GPL-1.0+ WITH Linux-syscall-note 14 ((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause) 5 LGPL-2.0+ WITH Linux-syscall-note 4 LGPL-2.1 WITH Linux-syscall-note 3 ((GPL-2.0 WITH Linux-syscall-note) OR MIT) 3 ((GPL-2.0 WITH Linux-syscall-note) AND MIT) 1 and that resulted in the third patch in this series. - when the two scanners agreed on the detected license(s), that became the concluded license(s). - when there was disagreement between the two scanners (one detected a license but the other didn't, or they both detected different licenses) a manual inspection of the file occurred. - In most cases a manual inspection of the information in the file resulted in a clear resolution of the license that should apply (and which scanner probably needed to revisit its heuristics). - When it was not immediately clear, the license identifier was confirmed with lawyers working with the Linux Foundation. - If there was any question as to the appropriate license identifier, the file was flagged for further research and to be revisited later in time. In total, over 70 hours of logged manual review was done on the spreadsheet to determine the SPDX license identifiers to apply to the source files by Kate, Philippe, Thomas and, in some cases, confirmation by lawyers working with the Linux Foundation. Kate also obtained a third independent scan of the 4.13 code base from FOSSology, and compared selected files where the other two scanners disagreed against that SPDX file, to see if there was new insights. The Windriver scanner is based on an older version of FOSSology in part, so they are related. Thomas did random spot checks in about 500 files from the spreadsheets for the uapi headers and agreed with SPDX license identifier in the files he inspected. For the non-uapi files Thomas did random spot checks in about 15000 files. In initial set of patches against 4.14-rc6, 3 files were found to have copy/paste license identifier errors, and have been fixed to reflect the correct identifier. Additionally Philippe spent 10 hours this week doing a detailed manual inspection and review of the 12,461 patched files from the initial patch version early this week with: - a full scancode scan run, collecting the matched texts, detected license ids and scores - reviewing anything where there was a license detected (about 500+ files) to ensure that the applied SPDX license was correct - reviewing anything where there was no detection but the patch license was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied SPDX license was correct This produced a worksheet with 20 files needing minor correction. This worksheet was then exported into 3 different .csv files for the different types of files to be modified. These .csv files were then reviewed by Greg. Thomas wrote a script to parse the csv files and add the proper SPDX tag to the file, in the format that the file expected. This script was further refined by Greg based on the output to detect more types of files automatically and to distinguish between header and source .c files (which need different comment types.) Finally Greg ran the script using the .csv files to generate the patches. Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Philippe Ombredanne <pombredanne@nexb.com> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
543 lines
12 KiB
C
543 lines
12 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _ASM_POWERPC_CMPXCHG_H_
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#define _ASM_POWERPC_CMPXCHG_H_
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#ifdef __KERNEL__
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#include <linux/compiler.h>
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#include <asm/synch.h>
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#include <asm/asm-compat.h>
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#include <linux/bug.h>
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#ifdef __BIG_ENDIAN
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#define BITOFF_CAL(size, off) ((sizeof(u32) - size - off) * BITS_PER_BYTE)
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#else
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#define BITOFF_CAL(size, off) (off * BITS_PER_BYTE)
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#endif
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#define XCHG_GEN(type, sfx, cl) \
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static inline u32 __xchg_##type##sfx(volatile void *p, u32 val) \
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{ \
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unsigned int prev, prev_mask, tmp, bitoff, off; \
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\
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off = (unsigned long)p % sizeof(u32); \
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bitoff = BITOFF_CAL(sizeof(type), off); \
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p -= off; \
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val <<= bitoff; \
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prev_mask = (u32)(type)-1 << bitoff; \
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\
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__asm__ __volatile__( \
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"1: lwarx %0,0,%3\n" \
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" andc %1,%0,%5\n" \
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" or %1,%1,%4\n" \
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PPC405_ERR77(0,%3) \
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" stwcx. %1,0,%3\n" \
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" bne- 1b\n" \
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: "=&r" (prev), "=&r" (tmp), "+m" (*(u32*)p) \
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: "r" (p), "r" (val), "r" (prev_mask) \
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: "cc", cl); \
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\
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return prev >> bitoff; \
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}
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#define CMPXCHG_GEN(type, sfx, br, br2, cl) \
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static inline \
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u32 __cmpxchg_##type##sfx(volatile void *p, u32 old, u32 new) \
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{ \
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unsigned int prev, prev_mask, tmp, bitoff, off; \
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\
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off = (unsigned long)p % sizeof(u32); \
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bitoff = BITOFF_CAL(sizeof(type), off); \
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p -= off; \
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old <<= bitoff; \
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new <<= bitoff; \
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prev_mask = (u32)(type)-1 << bitoff; \
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\
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__asm__ __volatile__( \
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br \
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"1: lwarx %0,0,%3\n" \
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" and %1,%0,%6\n" \
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" cmpw 0,%1,%4\n" \
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" bne- 2f\n" \
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" andc %1,%0,%6\n" \
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" or %1,%1,%5\n" \
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PPC405_ERR77(0,%3) \
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" stwcx. %1,0,%3\n" \
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" bne- 1b\n" \
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br2 \
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"\n" \
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"2:" \
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: "=&r" (prev), "=&r" (tmp), "+m" (*(u32*)p) \
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: "r" (p), "r" (old), "r" (new), "r" (prev_mask) \
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: "cc", cl); \
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\
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return prev >> bitoff; \
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}
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/*
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* Atomic exchange
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*
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* Changes the memory location '*p' to be val and returns
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* the previous value stored there.
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*/
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XCHG_GEN(u8, _local, "memory");
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XCHG_GEN(u8, _relaxed, "cc");
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XCHG_GEN(u16, _local, "memory");
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XCHG_GEN(u16, _relaxed, "cc");
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static __always_inline unsigned long
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__xchg_u32_local(volatile void *p, unsigned long val)
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{
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unsigned long prev;
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__asm__ __volatile__(
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"1: lwarx %0,0,%2 \n"
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PPC405_ERR77(0,%2)
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" stwcx. %3,0,%2 \n\
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bne- 1b"
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: "=&r" (prev), "+m" (*(volatile unsigned int *)p)
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: "r" (p), "r" (val)
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: "cc", "memory");
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return prev;
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}
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static __always_inline unsigned long
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__xchg_u32_relaxed(u32 *p, unsigned long val)
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{
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unsigned long prev;
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__asm__ __volatile__(
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"1: lwarx %0,0,%2\n"
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PPC405_ERR77(0, %2)
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" stwcx. %3,0,%2\n"
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" bne- 1b"
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: "=&r" (prev), "+m" (*p)
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: "r" (p), "r" (val)
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: "cc");
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return prev;
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}
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#ifdef CONFIG_PPC64
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static __always_inline unsigned long
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__xchg_u64_local(volatile void *p, unsigned long val)
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{
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unsigned long prev;
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__asm__ __volatile__(
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"1: ldarx %0,0,%2 \n"
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PPC405_ERR77(0,%2)
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" stdcx. %3,0,%2 \n\
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bne- 1b"
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: "=&r" (prev), "+m" (*(volatile unsigned long *)p)
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: "r" (p), "r" (val)
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: "cc", "memory");
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return prev;
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}
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static __always_inline unsigned long
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__xchg_u64_relaxed(u64 *p, unsigned long val)
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{
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unsigned long prev;
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__asm__ __volatile__(
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"1: ldarx %0,0,%2\n"
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PPC405_ERR77(0, %2)
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" stdcx. %3,0,%2\n"
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" bne- 1b"
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: "=&r" (prev), "+m" (*p)
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: "r" (p), "r" (val)
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: "cc");
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return prev;
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}
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#endif
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static __always_inline unsigned long
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__xchg_local(void *ptr, unsigned long x, unsigned int size)
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{
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switch (size) {
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case 1:
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return __xchg_u8_local(ptr, x);
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case 2:
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return __xchg_u16_local(ptr, x);
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case 4:
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return __xchg_u32_local(ptr, x);
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#ifdef CONFIG_PPC64
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case 8:
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return __xchg_u64_local(ptr, x);
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#endif
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}
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BUILD_BUG_ON_MSG(1, "Unsupported size for __xchg");
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return x;
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}
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static __always_inline unsigned long
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__xchg_relaxed(void *ptr, unsigned long x, unsigned int size)
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{
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switch (size) {
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case 1:
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return __xchg_u8_relaxed(ptr, x);
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case 2:
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return __xchg_u16_relaxed(ptr, x);
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case 4:
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return __xchg_u32_relaxed(ptr, x);
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#ifdef CONFIG_PPC64
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case 8:
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return __xchg_u64_relaxed(ptr, x);
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#endif
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}
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BUILD_BUG_ON_MSG(1, "Unsupported size for __xchg_local");
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return x;
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}
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#define xchg_local(ptr,x) \
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({ \
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__typeof__(*(ptr)) _x_ = (x); \
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(__typeof__(*(ptr))) __xchg_local((ptr), \
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(unsigned long)_x_, sizeof(*(ptr))); \
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})
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#define xchg_relaxed(ptr, x) \
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({ \
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__typeof__(*(ptr)) _x_ = (x); \
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(__typeof__(*(ptr))) __xchg_relaxed((ptr), \
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(unsigned long)_x_, sizeof(*(ptr))); \
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})
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/*
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* Compare and exchange - if *p == old, set it to new,
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* and return the old value of *p.
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*/
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CMPXCHG_GEN(u8, , PPC_ATOMIC_ENTRY_BARRIER, PPC_ATOMIC_EXIT_BARRIER, "memory");
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CMPXCHG_GEN(u8, _local, , , "memory");
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CMPXCHG_GEN(u8, _acquire, , PPC_ACQUIRE_BARRIER, "memory");
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CMPXCHG_GEN(u8, _relaxed, , , "cc");
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CMPXCHG_GEN(u16, , PPC_ATOMIC_ENTRY_BARRIER, PPC_ATOMIC_EXIT_BARRIER, "memory");
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CMPXCHG_GEN(u16, _local, , , "memory");
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CMPXCHG_GEN(u16, _acquire, , PPC_ACQUIRE_BARRIER, "memory");
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CMPXCHG_GEN(u16, _relaxed, , , "cc");
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static __always_inline unsigned long
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__cmpxchg_u32(volatile unsigned int *p, unsigned long old, unsigned long new)
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{
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unsigned int prev;
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__asm__ __volatile__ (
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PPC_ATOMIC_ENTRY_BARRIER
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"1: lwarx %0,0,%2 # __cmpxchg_u32\n\
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cmpw 0,%0,%3\n\
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bne- 2f\n"
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PPC405_ERR77(0,%2)
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" stwcx. %4,0,%2\n\
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bne- 1b"
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PPC_ATOMIC_EXIT_BARRIER
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"\n\
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2:"
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: "=&r" (prev), "+m" (*p)
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: "r" (p), "r" (old), "r" (new)
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: "cc", "memory");
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return prev;
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}
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static __always_inline unsigned long
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__cmpxchg_u32_local(volatile unsigned int *p, unsigned long old,
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unsigned long new)
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{
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unsigned int prev;
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__asm__ __volatile__ (
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"1: lwarx %0,0,%2 # __cmpxchg_u32\n\
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cmpw 0,%0,%3\n\
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bne- 2f\n"
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PPC405_ERR77(0,%2)
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" stwcx. %4,0,%2\n\
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bne- 1b"
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"\n\
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2:"
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: "=&r" (prev), "+m" (*p)
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: "r" (p), "r" (old), "r" (new)
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: "cc", "memory");
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return prev;
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}
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static __always_inline unsigned long
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__cmpxchg_u32_relaxed(u32 *p, unsigned long old, unsigned long new)
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{
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unsigned long prev;
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__asm__ __volatile__ (
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"1: lwarx %0,0,%2 # __cmpxchg_u32_relaxed\n"
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" cmpw 0,%0,%3\n"
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" bne- 2f\n"
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PPC405_ERR77(0, %2)
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" stwcx. %4,0,%2\n"
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" bne- 1b\n"
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"2:"
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: "=&r" (prev), "+m" (*p)
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: "r" (p), "r" (old), "r" (new)
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: "cc");
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return prev;
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}
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/*
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* cmpxchg family don't have order guarantee if cmp part fails, therefore we
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* can avoid superfluous barriers if we use assembly code to implement
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* cmpxchg() and cmpxchg_acquire(), however we don't do the similar for
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* cmpxchg_release() because that will result in putting a barrier in the
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* middle of a ll/sc loop, which is probably a bad idea. For example, this
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* might cause the conditional store more likely to fail.
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*/
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static __always_inline unsigned long
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__cmpxchg_u32_acquire(u32 *p, unsigned long old, unsigned long new)
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{
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unsigned long prev;
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__asm__ __volatile__ (
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"1: lwarx %0,0,%2 # __cmpxchg_u32_acquire\n"
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" cmpw 0,%0,%3\n"
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" bne- 2f\n"
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PPC405_ERR77(0, %2)
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" stwcx. %4,0,%2\n"
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" bne- 1b\n"
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PPC_ACQUIRE_BARRIER
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"\n"
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"2:"
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: "=&r" (prev), "+m" (*p)
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: "r" (p), "r" (old), "r" (new)
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: "cc", "memory");
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return prev;
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}
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#ifdef CONFIG_PPC64
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static __always_inline unsigned long
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__cmpxchg_u64(volatile unsigned long *p, unsigned long old, unsigned long new)
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{
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unsigned long prev;
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__asm__ __volatile__ (
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PPC_ATOMIC_ENTRY_BARRIER
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"1: ldarx %0,0,%2 # __cmpxchg_u64\n\
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cmpd 0,%0,%3\n\
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bne- 2f\n\
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stdcx. %4,0,%2\n\
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bne- 1b"
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PPC_ATOMIC_EXIT_BARRIER
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"\n\
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2:"
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: "=&r" (prev), "+m" (*p)
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: "r" (p), "r" (old), "r" (new)
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: "cc", "memory");
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return prev;
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}
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static __always_inline unsigned long
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__cmpxchg_u64_local(volatile unsigned long *p, unsigned long old,
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unsigned long new)
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{
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unsigned long prev;
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__asm__ __volatile__ (
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"1: ldarx %0,0,%2 # __cmpxchg_u64\n\
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cmpd 0,%0,%3\n\
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bne- 2f\n\
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stdcx. %4,0,%2\n\
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bne- 1b"
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"\n\
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2:"
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: "=&r" (prev), "+m" (*p)
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: "r" (p), "r" (old), "r" (new)
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: "cc", "memory");
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return prev;
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}
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static __always_inline unsigned long
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__cmpxchg_u64_relaxed(u64 *p, unsigned long old, unsigned long new)
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{
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unsigned long prev;
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__asm__ __volatile__ (
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"1: ldarx %0,0,%2 # __cmpxchg_u64_relaxed\n"
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" cmpd 0,%0,%3\n"
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" bne- 2f\n"
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" stdcx. %4,0,%2\n"
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" bne- 1b\n"
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"2:"
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: "=&r" (prev), "+m" (*p)
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: "r" (p), "r" (old), "r" (new)
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: "cc");
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return prev;
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}
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static __always_inline unsigned long
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__cmpxchg_u64_acquire(u64 *p, unsigned long old, unsigned long new)
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{
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unsigned long prev;
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__asm__ __volatile__ (
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"1: ldarx %0,0,%2 # __cmpxchg_u64_acquire\n"
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" cmpd 0,%0,%3\n"
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" bne- 2f\n"
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" stdcx. %4,0,%2\n"
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" bne- 1b\n"
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PPC_ACQUIRE_BARRIER
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"\n"
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"2:"
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: "=&r" (prev), "+m" (*p)
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: "r" (p), "r" (old), "r" (new)
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: "cc", "memory");
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return prev;
|
|
}
|
|
#endif
|
|
|
|
static __always_inline unsigned long
|
|
__cmpxchg(volatile void *ptr, unsigned long old, unsigned long new,
|
|
unsigned int size)
|
|
{
|
|
switch (size) {
|
|
case 1:
|
|
return __cmpxchg_u8(ptr, old, new);
|
|
case 2:
|
|
return __cmpxchg_u16(ptr, old, new);
|
|
case 4:
|
|
return __cmpxchg_u32(ptr, old, new);
|
|
#ifdef CONFIG_PPC64
|
|
case 8:
|
|
return __cmpxchg_u64(ptr, old, new);
|
|
#endif
|
|
}
|
|
BUILD_BUG_ON_MSG(1, "Unsupported size for __cmpxchg");
|
|
return old;
|
|
}
|
|
|
|
static __always_inline unsigned long
|
|
__cmpxchg_local(void *ptr, unsigned long old, unsigned long new,
|
|
unsigned int size)
|
|
{
|
|
switch (size) {
|
|
case 1:
|
|
return __cmpxchg_u8_local(ptr, old, new);
|
|
case 2:
|
|
return __cmpxchg_u16_local(ptr, old, new);
|
|
case 4:
|
|
return __cmpxchg_u32_local(ptr, old, new);
|
|
#ifdef CONFIG_PPC64
|
|
case 8:
|
|
return __cmpxchg_u64_local(ptr, old, new);
|
|
#endif
|
|
}
|
|
BUILD_BUG_ON_MSG(1, "Unsupported size for __cmpxchg_local");
|
|
return old;
|
|
}
|
|
|
|
static __always_inline unsigned long
|
|
__cmpxchg_relaxed(void *ptr, unsigned long old, unsigned long new,
|
|
unsigned int size)
|
|
{
|
|
switch (size) {
|
|
case 1:
|
|
return __cmpxchg_u8_relaxed(ptr, old, new);
|
|
case 2:
|
|
return __cmpxchg_u16_relaxed(ptr, old, new);
|
|
case 4:
|
|
return __cmpxchg_u32_relaxed(ptr, old, new);
|
|
#ifdef CONFIG_PPC64
|
|
case 8:
|
|
return __cmpxchg_u64_relaxed(ptr, old, new);
|
|
#endif
|
|
}
|
|
BUILD_BUG_ON_MSG(1, "Unsupported size for __cmpxchg_relaxed");
|
|
return old;
|
|
}
|
|
|
|
static __always_inline unsigned long
|
|
__cmpxchg_acquire(void *ptr, unsigned long old, unsigned long new,
|
|
unsigned int size)
|
|
{
|
|
switch (size) {
|
|
case 1:
|
|
return __cmpxchg_u8_acquire(ptr, old, new);
|
|
case 2:
|
|
return __cmpxchg_u16_acquire(ptr, old, new);
|
|
case 4:
|
|
return __cmpxchg_u32_acquire(ptr, old, new);
|
|
#ifdef CONFIG_PPC64
|
|
case 8:
|
|
return __cmpxchg_u64_acquire(ptr, old, new);
|
|
#endif
|
|
}
|
|
BUILD_BUG_ON_MSG(1, "Unsupported size for __cmpxchg_acquire");
|
|
return old;
|
|
}
|
|
#define cmpxchg(ptr, o, n) \
|
|
({ \
|
|
__typeof__(*(ptr)) _o_ = (o); \
|
|
__typeof__(*(ptr)) _n_ = (n); \
|
|
(__typeof__(*(ptr))) __cmpxchg((ptr), (unsigned long)_o_, \
|
|
(unsigned long)_n_, sizeof(*(ptr))); \
|
|
})
|
|
|
|
|
|
#define cmpxchg_local(ptr, o, n) \
|
|
({ \
|
|
__typeof__(*(ptr)) _o_ = (o); \
|
|
__typeof__(*(ptr)) _n_ = (n); \
|
|
(__typeof__(*(ptr))) __cmpxchg_local((ptr), (unsigned long)_o_, \
|
|
(unsigned long)_n_, sizeof(*(ptr))); \
|
|
})
|
|
|
|
#define cmpxchg_relaxed(ptr, o, n) \
|
|
({ \
|
|
__typeof__(*(ptr)) _o_ = (o); \
|
|
__typeof__(*(ptr)) _n_ = (n); \
|
|
(__typeof__(*(ptr))) __cmpxchg_relaxed((ptr), \
|
|
(unsigned long)_o_, (unsigned long)_n_, \
|
|
sizeof(*(ptr))); \
|
|
})
|
|
|
|
#define cmpxchg_acquire(ptr, o, n) \
|
|
({ \
|
|
__typeof__(*(ptr)) _o_ = (o); \
|
|
__typeof__(*(ptr)) _n_ = (n); \
|
|
(__typeof__(*(ptr))) __cmpxchg_acquire((ptr), \
|
|
(unsigned long)_o_, (unsigned long)_n_, \
|
|
sizeof(*(ptr))); \
|
|
})
|
|
#ifdef CONFIG_PPC64
|
|
#define cmpxchg64(ptr, o, n) \
|
|
({ \
|
|
BUILD_BUG_ON(sizeof(*(ptr)) != 8); \
|
|
cmpxchg((ptr), (o), (n)); \
|
|
})
|
|
#define cmpxchg64_local(ptr, o, n) \
|
|
({ \
|
|
BUILD_BUG_ON(sizeof(*(ptr)) != 8); \
|
|
cmpxchg_local((ptr), (o), (n)); \
|
|
})
|
|
#define cmpxchg64_relaxed(ptr, o, n) \
|
|
({ \
|
|
BUILD_BUG_ON(sizeof(*(ptr)) != 8); \
|
|
cmpxchg_relaxed((ptr), (o), (n)); \
|
|
})
|
|
#define cmpxchg64_acquire(ptr, o, n) \
|
|
({ \
|
|
BUILD_BUG_ON(sizeof(*(ptr)) != 8); \
|
|
cmpxchg_acquire((ptr), (o), (n)); \
|
|
})
|
|
#else
|
|
#include <asm-generic/cmpxchg-local.h>
|
|
#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
|
|
#endif
|
|
|
|
#endif /* __KERNEL__ */
|
|
#endif /* _ASM_POWERPC_CMPXCHG_H_ */
|