mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-11 17:36:49 +07:00
a097b13c52
Add support for the new MT7621/8 SoC and kill ifdefs. Cleanup some whitespace error while we are at it. Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/8028/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
64 lines
1.5 KiB
C
64 lines
1.5 KiB
C
/*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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*
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* Copyright (C) 2011-2012 Gabor Juhos <juhosg@openwrt.org>
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*/
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#include <linux/io.h>
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#include <linux/serial_reg.h>
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#include <asm/addrspace.h>
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#ifdef CONFIG_SOC_RT288X
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#define EARLY_UART_BASE 0x300c00
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#define CHIPID_BASE 0x300004
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#elif defined(CONFIG_SOC_MT7621)
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#define EARLY_UART_BASE 0x1E000c00
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#define CHIPID_BASE 0x1E000004
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#else
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#define EARLY_UART_BASE 0x10000c00
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#define CHIPID_BASE 0x10000004
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#endif
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#define MT7628_CHIP_NAME1 0x20203832
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#define UART_REG_TX 0x04
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#define UART_REG_LSR 0x14
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#define UART_REG_LSR_RT2880 0x1c
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static __iomem void *uart_membase = (__iomem void *) KSEG1ADDR(EARLY_UART_BASE);
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static __iomem void *chipid_membase = (__iomem void *) KSEG1ADDR(CHIPID_BASE);
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static inline void uart_w32(u32 val, unsigned reg)
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{
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__raw_writel(val, uart_membase + reg);
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}
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static inline u32 uart_r32(unsigned reg)
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{
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return __raw_readl(uart_membase + reg);
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}
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static inline int soc_is_mt7628(void)
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{
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return IS_ENABLED(CONFIG_SOC_MT7620) &&
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(__raw_readl(chipid_membase) == MT7628_CHIP_NAME1);
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}
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void prom_putchar(unsigned char ch)
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{
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if (IS_ENABLED(CONFIG_SOC_MT7621) || soc_is_mt7628()) {
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uart_w32(ch, UART_TX);
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while ((uart_r32(UART_REG_LSR) & UART_LSR_THRE) == 0)
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;
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} else {
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while ((uart_r32(UART_REG_LSR_RT2880) & UART_LSR_THRE) == 0)
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;
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uart_w32(ch, UART_REG_TX);
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while ((uart_r32(UART_REG_LSR_RT2880) & UART_LSR_THRE) == 0)
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;
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}
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}
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