mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-28 05:35:16 +07:00
edfaf05c2f
All OMAP IP blocks expect LE data, but CPU may operate in BE mode. Need to use endian neutral functions to read/write h/w registers. I.e instead of __raw_read[lw] and __raw_write[lw] functions code need to use read[lw]_relaxed and write[lw]_relaxed functions. If the first simply reads/writes register, the second will byteswap it if host operates in BE mode. Changes are trivial sed like replacement of __raw_xxx functions with xxx_relaxed variant. Signed-off-by: Victor Kamensky <victor.kamensky@linaro.org> Signed-off-by: Taras Kondratiuk <taras.kondratiuk@linaro.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
48 lines
1.0 KiB
C
48 lines
1.0 KiB
C
/*
|
|
* OMAP2xxx sys_clk-specific clock code
|
|
*
|
|
* Copyright (C) 2005-2008 Texas Instruments, Inc.
|
|
* Copyright (C) 2004-2010 Nokia Corporation
|
|
*
|
|
* Contacts:
|
|
* Richard Woodruff <r-woodruff2@ti.com>
|
|
* Paul Walmsley
|
|
*
|
|
* Based on earlier work by Tuukka Tikkanen, Tony Lindgren,
|
|
* Gordon McNutt and RidgeRun, Inc.
|
|
*
|
|
* This program is free software; you can redistribute it and/or modify
|
|
* it under the terms of the GNU General Public License version 2 as
|
|
* published by the Free Software Foundation.
|
|
*/
|
|
#undef DEBUG
|
|
|
|
#include <linux/kernel.h>
|
|
#include <linux/errno.h>
|
|
#include <linux/clk.h>
|
|
#include <linux/io.h>
|
|
|
|
#include "clock.h"
|
|
#include "clock2xxx.h"
|
|
#include "prm2xxx_3xxx.h"
|
|
#include "prm-regbits-24xx.h"
|
|
|
|
void __iomem *prcm_clksrc_ctrl;
|
|
|
|
u32 omap2xxx_get_sysclkdiv(void)
|
|
{
|
|
u32 div;
|
|
|
|
div = readl_relaxed(prcm_clksrc_ctrl);
|
|
div &= OMAP_SYSCLKDIV_MASK;
|
|
div >>= OMAP_SYSCLKDIV_SHIFT;
|
|
|
|
return div;
|
|
}
|
|
|
|
unsigned long omap2xxx_sys_clk_recalc(struct clk_hw *clk,
|
|
unsigned long parent_rate)
|
|
{
|
|
return parent_rate / omap2xxx_get_sysclkdiv();
|
|
}
|