mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-26 11:20:53 +07:00
d96672e620
Add clocks to the IPs already described in the pxa device-tree files. There are more clocks in the clock tree than IPs described in the current pxa device-tree. This patch ensures that : - the current description is correct - the clocks are actually claimed, so that clock framework doesn't disable them automatically (unused clocks shutdown) Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
74 lines
1.5 KiB
Plaintext
74 lines
1.5 KiB
Plaintext
/* The pxa3xx skeleton simply augments the 2xx version */
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#include "pxa2xx.dtsi"
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#include "dt-bindings/clock/pxa-clock.h"
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/ {
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model = "Marvell PXA27x familiy SoC";
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compatible = "marvell,pxa27x";
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pxabus {
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pxairq: interrupt-controller@40d00000 {
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marvell,intc-priority;
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marvell,intc-nr-irqs = <34>;
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};
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gpio: gpio@40e00000 {
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compatible = "intel,pxa27x-gpio";
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clocks = <&clks CLK_NONE>;
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};
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pwm0: pwm@40b00000 {
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compatible = "marvell,pxa270-pwm", "marvell,pxa250-pwm";
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reg = <0x40b00000 0x10>;
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#pwm-cells = <1>;
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clocks = <&clks CLK_PWM0>;
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};
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pwm1: pwm@40b00010 {
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compatible = "marvell,pxa270-pwm", "marvell,pxa250-pwm";
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reg = <0x40b00010 0x10>;
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#pwm-cells = <1>;
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clocks = <&clks CLK_PWM1>;
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};
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pwm2: pwm@40c00000 {
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compatible = "marvell,pxa270-pwm", "marvell,pxa250-pwm";
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reg = <0x40c00000 0x10>;
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#pwm-cells = <1>;
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clocks = <&clks CLK_PWM0>;
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};
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pwm3: pwm@40c00010 {
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compatible = "marvell,pxa270-pwm", "marvell,pxa250-pwm";
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reg = <0x40c00010 0x10>;
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#pwm-cells = <1>;
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clocks = <&clks CLK_PWM1>;
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};
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pwri2c: i2c@40f000180 {
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compatible = "mrvl,pxa-i2c";
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reg = <0x40f00180 0x24>;
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interrupts = <6>;
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clocks = <&clks CLK_PWRI2C>;
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status = "disabled";
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};
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};
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clocks {
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/*
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* The muxing of external clocks/internal dividers for osc* clock
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* sources has been hidden under the carpet by now.
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*/
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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clks: pxa2xx_clks@41300004 {
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compatible = "marvell,pxa270-clocks";
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#clock-cells = <1>;
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status = "okay";
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};
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};
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};
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