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a94235af11
Arcturus ASIC specific powerplay interfaces.
V2: correct SMU msg naming
drop unnecessary debugs
V3: rebase (Alex)
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Kevin Wang <kevin1.wang@amd.com>
Reviewed-by: Le Ma <Le.Ma@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
73 lines
2.5 KiB
C
73 lines
2.5 KiB
C
/*
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* Copyright 2019 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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*/
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#ifndef __ARCTURUS_PPT_H__
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#define __ARCTURUS_PPT_H__
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#define ARCTURUS_UMD_PSTATE_GFXCLK_LEVEL 0x3
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#define ARCTURUS_UMD_PSTATE_SOCCLK_LEVEL 0x3
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#define ARCTURUS_UMD_PSTATE_MCLK_LEVEL 0x2
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#define MAX_DPM_NUMBER 16
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#define MAX_PCIE_CONF 2
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struct arcturus_dpm_level {
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bool enabled;
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uint32_t value;
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uint32_t param1;
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};
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struct arcturus_dpm_state {
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uint32_t soft_min_level;
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uint32_t soft_max_level;
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uint32_t hard_min_level;
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uint32_t hard_max_level;
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};
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struct arcturus_single_dpm_table {
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uint32_t count;
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struct arcturus_dpm_state dpm_state;
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struct arcturus_dpm_level dpm_levels[MAX_DPM_NUMBER];
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};
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struct arcturus_pcie_table {
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uint16_t count;
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uint8_t pcie_gen[MAX_PCIE_CONF];
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uint8_t pcie_lane[MAX_PCIE_CONF];
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uint32_t lclk[MAX_PCIE_CONF];
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};
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struct arcturus_dpm_table {
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struct arcturus_single_dpm_table soc_table;
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struct arcturus_single_dpm_table gfx_table;
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struct arcturus_single_dpm_table mem_table;
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struct arcturus_single_dpm_table eclk_table;
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struct arcturus_single_dpm_table vclk_table;
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struct arcturus_single_dpm_table dclk_table;
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struct arcturus_single_dpm_table fclk_table;
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struct arcturus_pcie_table pcie_table;
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};
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extern void arcturus_set_ppt_funcs(struct smu_context *smu);
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#endif
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