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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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95c1cd1392
DRA7xxx contains a very similar DSS to OMAP5. The main differences are: * no DSI or RFBI support. * 1 or 2 dedicated video PLLs. * need to do additional configuration to the DRA7 CONTROL module. DRA72xx has only one video PLL, and DRA74xx has two. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Cc: devicetree@vger.kernel.org Acked-by: Tony Lindgren <tony@atomide.com>
91 lines
1.9 KiB
Plaintext
91 lines
1.9 KiB
Plaintext
/*
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* Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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* Based on "omap4.dtsi"
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*/
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#include "dra7.dtsi"
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/ {
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compatible = "ti,dra742", "ti,dra74", "ti,dra7";
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu0: cpu@0 {
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device_type = "cpu";
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compatible = "arm,cortex-a15";
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reg = <0>;
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operating-points = <
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/* kHz uV */
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1000000 1060000
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1176000 1160000
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>;
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clocks = <&dpll_mpu_ck>;
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clock-names = "cpu";
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clock-latency = <300000>; /* From omap-cpufreq driver */
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/* cooling options */
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cooling-min-level = <0>;
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cooling-max-level = <2>;
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#cooling-cells = <2>; /* min followed by max */
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};
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cpu@1 {
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device_type = "cpu";
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compatible = "arm,cortex-a15";
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reg = <1>;
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};
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};
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pmu {
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compatible = "arm,cortex-a15-pmu";
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interrupt-parent = <&wakeupgen>;
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interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>;
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};
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ocp {
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omap_dwc3_4: omap_dwc3_4@48940000 {
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compatible = "ti,dwc3";
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ti,hwmods = "usb_otg_ss4";
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reg = <0x48940000 0x10000>;
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interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>;
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#address-cells = <1>;
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#size-cells = <1>;
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utmi-mode = <2>;
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ranges;
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status = "disabled";
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usb4: usb@48950000 {
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compatible = "snps,dwc3";
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reg = <0x48950000 0x17000>;
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interrupts = <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
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tx-fifo-resize;
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maximum-speed = "high-speed";
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dr_mode = "otg";
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};
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};
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};
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};
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&dss {
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reg = <0x58000000 0x80>,
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<0x58004054 0x4>,
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<0x58004300 0x20>,
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<0x58005054 0x4>,
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<0x58005300 0x20>;
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reg-names = "dss", "pll1_clkctrl", "pll1",
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"pll2_clkctrl", "pll2";
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clocks = <&dss_dss_clk>,
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<&dss_video1_clk>,
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<&dss_video2_clk>;
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clock-names = "fck", "video1_clk", "video2_clk";
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};
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