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53edb2c62e
drivers/gpu/drm/i2c/ch7006.ko: -.text 5913 +.text 5897 -.rodata 664 +.rodata 7256 -.data 6992 +.data 416 Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
346 lines
10 KiB
C
346 lines
10 KiB
C
/*
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* Copyright (C) 2009 Francisco Jerez.
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* All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining
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* a copy of this software and associated documentation files (the
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* "Software"), to deal in the Software without restriction, including
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* without limitation the rights to use, copy, modify, merge, publish,
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* distribute, sublicense, and/or sell copies of the Software, and to
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* permit persons to whom the Software is furnished to do so, subject to
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* the following conditions:
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*
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* The above copyright notice and this permission notice (including the
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* next paragraph) shall be included in all copies or substantial
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* portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
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* IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
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* LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
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* OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
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* WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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*/
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#ifndef __DRM_I2C_CH7006_PRIV_H__
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#define __DRM_I2C_CH7006_PRIV_H__
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#include <drm/drmP.h>
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#include <drm/drm_crtc_helper.h>
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#include <drm/drm_encoder_slave.h>
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#include <drm/i2c/ch7006.h>
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typedef int64_t fixed;
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#define fixed1 (1LL << 32)
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enum ch7006_tv_norm {
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TV_NORM_PAL,
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TV_NORM_PAL_M,
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TV_NORM_PAL_N,
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TV_NORM_PAL_NC,
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TV_NORM_PAL_60,
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TV_NORM_NTSC_M,
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TV_NORM_NTSC_J,
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NUM_TV_NORMS
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};
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struct ch7006_tv_norm_info {
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fixed vrefresh;
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int vdisplay;
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int vtotal;
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int hvirtual;
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fixed subc_freq;
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fixed black_level;
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uint32_t dispmode;
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int voffset;
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};
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struct ch7006_mode {
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struct drm_display_mode mode;
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int enc_hdisp;
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int enc_vdisp;
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fixed subc_coeff;
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uint32_t dispmode;
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uint32_t valid_scales;
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uint32_t valid_norms;
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};
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struct ch7006_state {
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uint8_t regs[0x26];
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};
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struct ch7006_priv {
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struct ch7006_encoder_params params;
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const struct ch7006_mode *mode;
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struct ch7006_state state;
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struct ch7006_state saved_state;
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struct drm_property *scale_property;
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int select_subconnector;
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int subconnector;
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int hmargin;
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int vmargin;
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enum ch7006_tv_norm norm;
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int brightness;
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int contrast;
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int flicker;
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int scale;
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int chip_version;
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int last_dpms;
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};
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#define to_ch7006_priv(x) \
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((struct ch7006_priv *)to_encoder_slave(x)->slave_priv)
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extern int ch7006_debug;
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extern char *ch7006_tv_norm;
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extern int ch7006_scale;
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extern const char * const ch7006_tv_norm_names[];
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extern const struct ch7006_tv_norm_info ch7006_tv_norms[];
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extern const struct ch7006_mode ch7006_modes[];
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const struct ch7006_mode *ch7006_lookup_mode(struct drm_encoder *encoder,
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const struct drm_display_mode *drm_mode);
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void ch7006_setup_levels(struct drm_encoder *encoder);
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void ch7006_setup_subcarrier(struct drm_encoder *encoder);
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void ch7006_setup_pll(struct drm_encoder *encoder);
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void ch7006_setup_power_state(struct drm_encoder *encoder);
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void ch7006_setup_properties(struct drm_encoder *encoder);
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void ch7006_write(struct i2c_client *client, uint8_t addr, uint8_t val);
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uint8_t ch7006_read(struct i2c_client *client, uint8_t addr);
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void ch7006_state_load(struct i2c_client *client,
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struct ch7006_state *state);
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void ch7006_state_save(struct i2c_client *client,
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struct ch7006_state *state);
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/* Some helper macros */
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#define ch7006_dbg(client, format, ...) do { \
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if (ch7006_debug) \
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dev_printk(KERN_DEBUG, &client->dev, \
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"%s: " format, __func__, ## __VA_ARGS__); \
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} while (0)
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#define ch7006_info(client, format, ...) \
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dev_info(&client->dev, format, __VA_ARGS__)
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#define ch7006_err(client, format, ...) \
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dev_err(&client->dev, format, __VA_ARGS__)
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#define __mask(src, bitfield) \
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(((2 << (1 ? bitfield)) - 1) & ~((1 << (0 ? bitfield)) - 1))
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#define mask(bitfield) __mask(bitfield)
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#define __bitf(src, bitfield, x) \
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(((x) >> (src) << (0 ? bitfield)) & __mask(src, bitfield))
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#define bitf(bitfield, x) __bitf(bitfield, x)
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#define bitfs(bitfield, s) __bitf(bitfield, bitfield##_##s)
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#define setbitf(state, reg, bitfield, x) \
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state->regs[reg] = (state->regs[reg] & ~mask(reg##_##bitfield)) \
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| bitf(reg##_##bitfield, x)
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#define __unbitf(src, bitfield, x) \
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((x & __mask(src, bitfield)) >> (0 ? bitfield) << (src))
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#define unbitf(bitfield, x) __unbitf(bitfield, x)
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static inline int interpolate(int y0, int y1, int y2, int x)
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{
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return y1 + (x < 50 ? y1 - y0 : y2 - y1) * (x - 50) / 50;
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}
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static inline int32_t round_fixed(fixed x)
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{
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return (x + fixed1/2) >> 32;
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}
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#define ch7006_load_reg(client, state, reg) ch7006_write(client, reg, state->regs[reg])
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#define ch7006_save_reg(client, state, reg) state->regs[reg] = ch7006_read(client, reg)
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/* Fixed hardware specs */
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#define CH7006_FREQ0 14318
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#define CH7006_MAXN 650
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#define CH7006_MAXM 315
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/* Register definitions */
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#define CH7006_DISPMODE 0x00
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#define CH7006_DISPMODE_INPUT_RES 0, 7:5
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#define CH7006_DISPMODE_INPUT_RES_512x384 0x0
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#define CH7006_DISPMODE_INPUT_RES_720x400 0x1
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#define CH7006_DISPMODE_INPUT_RES_640x400 0x2
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#define CH7006_DISPMODE_INPUT_RES_640x480 0x3
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#define CH7006_DISPMODE_INPUT_RES_800x600 0x4
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#define CH7006_DISPMODE_INPUT_RES_NATIVE 0x5
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#define CH7006_DISPMODE_OUTPUT_STD 0, 4:3
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#define CH7006_DISPMODE_OUTPUT_STD_PAL 0x0
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#define CH7006_DISPMODE_OUTPUT_STD_NTSC 0x1
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#define CH7006_DISPMODE_OUTPUT_STD_PAL_M 0x2
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#define CH7006_DISPMODE_OUTPUT_STD_NTSC_J 0x3
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#define CH7006_DISPMODE_SCALING_RATIO 0, 2:0
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#define CH7006_DISPMODE_SCALING_RATIO_5_4 0x0
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#define CH7006_DISPMODE_SCALING_RATIO_1_1 0x1
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#define CH7006_DISPMODE_SCALING_RATIO_7_8 0x2
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#define CH7006_DISPMODE_SCALING_RATIO_5_6 0x3
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#define CH7006_DISPMODE_SCALING_RATIO_3_4 0x4
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#define CH7006_DISPMODE_SCALING_RATIO_7_10 0x5
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#define CH7006_FFILTER 0x01
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#define CH7006_FFILTER_TEXT 0, 5:4
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#define CH7006_FFILTER_LUMA 0, 3:2
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#define CH7006_FFILTER_CHROMA 0, 1:0
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#define CH7006_FFILTER_CHROMA_NO_DCRAWL 0x3
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#define CH7006_BWIDTH 0x03
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#define CH7006_BWIDTH_5L_FFILER (1 << 7)
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#define CH7006_BWIDTH_CVBS_NO_CHROMA (1 << 6)
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#define CH7006_BWIDTH_CHROMA 0, 5:4
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#define CH7006_BWIDTH_SVIDEO_YPEAK (1 << 3)
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#define CH7006_BWIDTH_SVIDEO_LUMA 0, 2:1
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#define CH7006_BWIDTH_CVBS_LUMA 0, 0:0
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#define CH7006_INPUT_FORMAT 0x04
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#define CH7006_INPUT_FORMAT_DAC_GAIN (1 << 6)
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#define CH7006_INPUT_FORMAT_RGB_PASS_THROUGH (1 << 5)
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#define CH7006_INPUT_FORMAT_FORMAT 0, 3:0
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#define CH7006_INPUT_FORMAT_FORMAT_RGB16 0x0
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#define CH7006_INPUT_FORMAT_FORMAT_YCrCb24m16 0x1
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#define CH7006_INPUT_FORMAT_FORMAT_RGB24m16 0x2
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#define CH7006_INPUT_FORMAT_FORMAT_RGB15 0x3
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#define CH7006_INPUT_FORMAT_FORMAT_RGB24m12C 0x4
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#define CH7006_INPUT_FORMAT_FORMAT_RGB24m12I 0x5
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#define CH7006_INPUT_FORMAT_FORMAT_RGB24m8 0x6
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#define CH7006_INPUT_FORMAT_FORMAT_RGB16m8 0x7
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#define CH7006_INPUT_FORMAT_FORMAT_RGB15m8 0x8
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#define CH7006_INPUT_FORMAT_FORMAT_YCrCb24m8 0x9
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#define CH7006_CLKMODE 0x06
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#define CH7006_CLKMODE_SUBC_LOCK (1 << 7)
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#define CH7006_CLKMODE_MASTER (1 << 6)
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#define CH7006_CLKMODE_POS_EDGE (1 << 4)
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#define CH7006_CLKMODE_XCM 0, 3:2
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#define CH7006_CLKMODE_PCM 0, 1:0
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#define CH7006_START_ACTIVE 0x07
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#define CH7006_START_ACTIVE_0 0, 7:0
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#define CH7006_POV 0x08
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#define CH7006_POV_START_ACTIVE_8 8, 2:2
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#define CH7006_POV_HPOS_8 8, 1:1
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#define CH7006_POV_VPOS_8 8, 0:0
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#define CH7006_BLACK_LEVEL 0x09
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#define CH7006_BLACK_LEVEL_0 0, 7:0
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#define CH7006_HPOS 0x0a
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#define CH7006_HPOS_0 0, 7:0
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#define CH7006_VPOS 0x0b
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#define CH7006_VPOS_0 0, 7:0
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#define CH7006_INPUT_SYNC 0x0d
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#define CH7006_INPUT_SYNC_EMBEDDED (1 << 3)
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#define CH7006_INPUT_SYNC_OUTPUT (1 << 2)
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#define CH7006_INPUT_SYNC_PVSYNC (1 << 1)
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#define CH7006_INPUT_SYNC_PHSYNC (1 << 0)
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#define CH7006_POWER 0x0e
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#define CH7006_POWER_SCART (1 << 4)
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#define CH7006_POWER_RESET (1 << 3)
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#define CH7006_POWER_LEVEL 0, 2:0
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#define CH7006_POWER_LEVEL_CVBS_OFF 0x0
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#define CH7006_POWER_LEVEL_POWER_OFF 0x1
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#define CH7006_POWER_LEVEL_SVIDEO_OFF 0x2
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#define CH7006_POWER_LEVEL_NORMAL 0x3
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#define CH7006_POWER_LEVEL_FULL_POWER_OFF 0x4
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#define CH7006_DETECT 0x10
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#define CH7006_DETECT_SVIDEO_Y_TEST (1 << 3)
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#define CH7006_DETECT_SVIDEO_C_TEST (1 << 2)
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#define CH7006_DETECT_CVBS_TEST (1 << 1)
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#define CH7006_DETECT_SENSE (1 << 0)
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#define CH7006_CONTRAST 0x11
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#define CH7006_CONTRAST_0 0, 2:0
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#define CH7006_PLLOV 0x13
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#define CH7006_PLLOV_N_8 8, 2:1
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#define CH7006_PLLOV_M_8 8, 0:0
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#define CH7006_PLLM 0x14
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#define CH7006_PLLM_0 0, 7:0
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#define CH7006_PLLN 0x15
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#define CH7006_PLLN_0 0, 7:0
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#define CH7006_BCLKOUT 0x17
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#define CH7006_SUBC_INC0 0x18
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#define CH7006_SUBC_INC0_28 28, 3:0
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#define CH7006_SUBC_INC1 0x19
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#define CH7006_SUBC_INC1_24 24, 3:0
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#define CH7006_SUBC_INC2 0x1a
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#define CH7006_SUBC_INC2_20 20, 3:0
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#define CH7006_SUBC_INC3 0x1b
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#define CH7006_SUBC_INC3_GPIO1_VAL (1 << 7)
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#define CH7006_SUBC_INC3_GPIO0_VAL (1 << 6)
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#define CH7006_SUBC_INC3_POUT_3_3V (1 << 5)
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#define CH7006_SUBC_INC3_POUT_INV (1 << 4)
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#define CH7006_SUBC_INC3_16 16, 3:0
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#define CH7006_SUBC_INC4 0x1c
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#define CH7006_SUBC_INC4_GPIO1_IN (1 << 7)
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#define CH7006_SUBC_INC4_GPIO0_IN (1 << 6)
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#define CH7006_SUBC_INC4_DS_INPUT (1 << 4)
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#define CH7006_SUBC_INC4_12 12, 3:0
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#define CH7006_SUBC_INC5 0x1d
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#define CH7006_SUBC_INC5_8 8, 3:0
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#define CH7006_SUBC_INC6 0x1e
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#define CH7006_SUBC_INC6_4 4, 3:0
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#define CH7006_SUBC_INC7 0x1f
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#define CH7006_SUBC_INC7_0 0, 3:0
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#define CH7006_PLL_CONTROL 0x20
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#define CH7006_PLL_CONTROL_CPI (1 << 5)
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#define CH7006_PLL_CONTROL_CAPACITOR (1 << 4)
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#define CH7006_PLL_CONTROL_7STAGES (1 << 3)
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#define CH7006_PLL_CONTROL_DIGITAL_5V (1 << 2)
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#define CH7006_PLL_CONTROL_ANALOG_5V (1 << 1)
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#define CH7006_PLL_CONTROL_MEMORY_5V (1 << 0)
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#define CH7006_CALC_SUBC_INC0 0x21
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#define CH7006_CALC_SUBC_INC0_24 24, 4:3
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#define CH7006_CALC_SUBC_INC0_HYST 0, 2:1
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#define CH7006_CALC_SUBC_INC0_AUTO (1 << 0)
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#define CH7006_CALC_SUBC_INC1 0x22
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#define CH7006_CALC_SUBC_INC1_16 16, 7:0
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#define CH7006_CALC_SUBC_INC2 0x23
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#define CH7006_CALC_SUBC_INC2_8 8, 7:0
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#define CH7006_CALC_SUBC_INC3 0x24
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#define CH7006_CALC_SUBC_INC3_0 0, 7:0
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#define CH7006_VERSION_ID 0x25
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#endif
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