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ff2c8252bf
smp_ops providers do not modify their ops structures, so they should be made const for robustness. Since currently the MIPS kernel is not mapped with memory protection, this does not in itself provide any security benefit, but it still makes sense to make this change. There are also slight code size efficincies from the structure being made read-only, saving 128 bytes of kernel text on a pistachio_defconfig. Before: text data bss dec hex filename 7187239 1772752 470224 9430215 8fe4c7 vmlinux After: text data bss dec hex filename 7187111 1772752 470224 9430087 8fe447 vmlinux Signed-off-by: Matt Redfearn <matt.redfearn@imgtec.com> Cc: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Marcin Nowakowski <marcin.nowakowski@imgtec.com> Cc: Bart Van Assche <bart.vanassche@sandisk.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Huacai Chen <chenhc@lemote.com> Cc: Paul Gortmaker <paul.gortmaker@windriver.com> Cc: Kevin Cernekee <cernekee@gmail.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Doug Ledford <dledford@redhat.com> Cc: James Hogan <james.hogan@imgtec.com> Cc: Joe Perches <joe@perches.com> Cc: Florian Fainelli <f.fainelli@gmail.com> Cc: Ingo Molnar <mingo@kernel.org> Cc: Paul Burton <paul.burton@imgtec.com> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Steven J. Hill <steven.hill@cavium.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/16784/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
113 lines
3.0 KiB
C
113 lines
3.0 KiB
C
/*
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* This file is subject to the terms and conditions of the GNU General
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* Public License. See the file "COPYING" in the main directory of this
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* archive for more details.
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*
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* Copyright (C) 2000 - 2001 by Kanoj Sarcar (kanoj@sgi.com)
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* Copyright (C) 2000 - 2001 by Silicon Graphics, Inc.
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* Copyright (C) 2000, 2001, 2002 Ralf Baechle
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* Copyright (C) 2000, 2001 Broadcom Corporation
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*/
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#ifndef __ASM_SMP_H
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#define __ASM_SMP_H
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#include <linux/bitops.h>
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#include <linux/linkage.h>
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#include <linux/smp.h>
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#include <linux/threads.h>
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#include <linux/cpumask.h>
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#include <linux/atomic.h>
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#include <asm/smp-ops.h>
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extern int smp_num_siblings;
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extern cpumask_t cpu_sibling_map[];
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extern cpumask_t cpu_core_map[];
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extern cpumask_t cpu_foreign_map[];
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#define raw_smp_processor_id() (current_thread_info()->cpu)
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/* Map from cpu id to sequential logical cpu number. This will only
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not be idempotent when cpus failed to come on-line. */
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extern int __cpu_number_map[NR_CPUS];
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#define cpu_number_map(cpu) __cpu_number_map[cpu]
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/* The reverse map from sequential logical cpu number to cpu id. */
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extern int __cpu_logical_map[NR_CPUS];
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#define cpu_logical_map(cpu) __cpu_logical_map[cpu]
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#define NO_PROC_ID (-1)
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#define SMP_RESCHEDULE_YOURSELF 0x1 /* XXX braindead */
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#define SMP_CALL_FUNCTION 0x2
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/* Octeon - Tell another core to flush its icache */
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#define SMP_ICACHE_FLUSH 0x4
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#define SMP_ASK_C0COUNT 0x8
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/* Mask of CPUs which are currently definitely operating coherently */
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extern cpumask_t cpu_coherent_mask;
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extern asmlinkage void smp_bootstrap(void);
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extern void calculate_cpu_foreign_map(void);
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/*
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* this function sends a 'reschedule' IPI to another CPU.
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* it goes straight through and wastes no time serializing
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* anything. Worst case is that we lose a reschedule ...
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*/
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static inline void smp_send_reschedule(int cpu)
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{
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extern const struct plat_smp_ops *mp_ops; /* private */
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mp_ops->send_ipi_single(cpu, SMP_RESCHEDULE_YOURSELF);
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}
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#ifdef CONFIG_HOTPLUG_CPU
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static inline int __cpu_disable(void)
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{
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extern const struct plat_smp_ops *mp_ops; /* private */
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return mp_ops->cpu_disable();
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}
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static inline void __cpu_die(unsigned int cpu)
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{
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extern const struct plat_smp_ops *mp_ops; /* private */
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mp_ops->cpu_die(cpu);
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}
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extern void play_dead(void);
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#endif
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/*
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* This function will set up the necessary IPIs for Linux to communicate
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* with the CPUs in mask.
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* Return 0 on success.
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*/
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int mips_smp_ipi_allocate(const struct cpumask *mask);
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/*
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* This function will free up IPIs allocated with mips_smp_ipi_allocate to the
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* CPUs in mask, which must be a subset of the IPIs that have been configured.
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* Return 0 on success.
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*/
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int mips_smp_ipi_free(const struct cpumask *mask);
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static inline void arch_send_call_function_single_ipi(int cpu)
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{
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extern const struct plat_smp_ops *mp_ops; /* private */
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mp_ops->send_ipi_mask(cpumask_of(cpu), SMP_CALL_FUNCTION);
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}
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static inline void arch_send_call_function_ipi_mask(const struct cpumask *mask)
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{
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extern const struct plat_smp_ops *mp_ops; /* private */
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mp_ops->send_ipi_mask(mask, SMP_CALL_FUNCTION);
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}
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#endif /* __ASM_SMP_H */
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