Changbin Du d861ca237d drm/i915/gvt: Use standard pte bit definition ... GTT entry has similar format with the CPU PTE. We'd prefer named macro instead of hardcode. Signed-off-by: Changbin Du <changbin.du@intel.com> Reviewed-by: Zhi Wang <zhi.a.wang@intel.com> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>		2018-03-06 13:19:17 +08:00
..
drm	drm/i915/gvt: Use standard pte bit definition	2018-03-06 13:19:17 +08:00
host1x	gpu: host1x: Use IOMMU groups	2017-12-21 14:52:36 +01:00
ipu-v3	gpu: ipu-v3: allow to build with COMPILE_TEST	2017-12-19 12:49:11 +01:00
vga	vfs: do bulk POLL* -> EPOLL* replacement	2018-02-11 14:34:03 -08:00
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