mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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533b220f7b
- Branch Target Identification (BTI) * Support for ARMv8.5-BTI in both user- and kernel-space. This allows branch targets to limit the types of branch from which they can be called and additionally prevents branching to arbitrary code, although kernel support requires a very recent toolchain. * Function annotation via SYM_FUNC_START() so that assembly functions are wrapped with the relevant "landing pad" instructions. * BPF and vDSO updates to use the new instructions. * Addition of a new HWCAP and exposure of BTI capability to userspace via ID register emulation, along with ELF loader support for the BTI feature in .note.gnu.property. * Non-critical fixes to CFI unwind annotations in the sigreturn trampoline. - Shadow Call Stack (SCS) * Support for Clang's Shadow Call Stack feature, which reserves platform register x18 to point at a separate stack for each task that holds only return addresses. This protects function return control flow from buffer overruns on the main stack. * Save/restore of x18 across problematic boundaries (user-mode, hypervisor, EFI, suspend, etc). * Core support for SCS, should other architectures want to use it too. * SCS overflow checking on context-switch as part of the existing stack limit check if CONFIG_SCHED_STACK_END_CHECK=y. - CPU feature detection * Removed numerous "SANITY CHECK" errors when running on a system with mismatched AArch32 support at EL1. This is primarily a concern for KVM, which disabled support for 32-bit guests on such a system. * Addition of new ID registers and fields as the architecture has been extended. - Perf and PMU drivers * Minor fixes and cleanups to system PMU drivers. - Hardware errata * Unify KVM workarounds for VHE and nVHE configurations. * Sort vendor errata entries in Kconfig. - Secure Monitor Call Calling Convention (SMCCC) * Update to the latest specification from Arm (v1.2). * Allow PSCI code to query the SMCCC version. - Software Delegated Exception Interface (SDEI) * Unexport a bunch of unused symbols. * Minor fixes to handling of firmware data. - Pointer authentication * Add support for dumping the kernel PAC mask in vmcoreinfo so that the stack can be unwound by tools such as kdump. * Simplification of key initialisation during CPU bringup. - BPF backend * Improve immediate generation for logical and add/sub instructions. - vDSO - Minor fixes to the linker flags for consistency with other architectures and support for LLVM's unwinder. - Clean up logic to initialise and map the vDSO into userspace. - ACPI - Work around for an ambiguity in the IORT specification relating to the "num_ids" field. - Support _DMA method for all named components rather than only PCIe root complexes. - Minor other IORT-related fixes. - Miscellaneous * Initialise debug traps early for KGDB and fix KDB cacheflushing deadlock. * Minor tweaks to early boot state (documentation update, set TEXT_OFFSET to 0x0, increase alignment of PE/COFF sections). * Refactoring and cleanup -----BEGIN PGP SIGNATURE----- iQFEBAABCgAuFiEEPxTL6PPUbjXGY88ct6xw3ITBYzQFAl7U9csQHHdpbGxAa2Vy bmVsLm9yZwAKCRC3rHDchMFjNLBHCACs/YU4SM7Om5f+7QnxIKao5DBr2CnGGvdC yTfDghFDTLQVv3MufLlfno3yBe5G8sQpcZfcc+hewfcGoMzVZXu8s7LzH6VSn9T9 jmT3KjDMrg0RjSHzyumJp2McyelTk0a4FiKArSIIKsJSXUyb1uPSgm7SvKVDwEwU JGDzL9IGilmq59GiXfDzGhTZgmC37QdwRoRxDuqtqWQe5CHoRXYexg87HwBKOQxx HgU9L7ehri4MRZfpyjaDrr6quJo3TVnAAKXNBh3mZAskVS9ZrfKpEH0kYWYuqybv znKyHRecl/rrGePV8RTMtrwnSdU26zMXE/omsVVauDfG9hqzqm+Q =w3qi -----END PGP SIGNATURE----- Merge tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux Pull arm64 updates from Will Deacon: "A sizeable pile of arm64 updates for 5.8. Summary below, but the big two features are support for Branch Target Identification and Clang's Shadow Call stack. The latter is currently arm64-only, but the high-level parts are all in core code so it could easily be adopted by other architectures pending toolchain support Branch Target Identification (BTI): - Support for ARMv8.5-BTI in both user- and kernel-space. This allows branch targets to limit the types of branch from which they can be called and additionally prevents branching to arbitrary code, although kernel support requires a very recent toolchain. - Function annotation via SYM_FUNC_START() so that assembly functions are wrapped with the relevant "landing pad" instructions. - BPF and vDSO updates to use the new instructions. - Addition of a new HWCAP and exposure of BTI capability to userspace via ID register emulation, along with ELF loader support for the BTI feature in .note.gnu.property. - Non-critical fixes to CFI unwind annotations in the sigreturn trampoline. Shadow Call Stack (SCS): - Support for Clang's Shadow Call Stack feature, which reserves platform register x18 to point at a separate stack for each task that holds only return addresses. This protects function return control flow from buffer overruns on the main stack. - Save/restore of x18 across problematic boundaries (user-mode, hypervisor, EFI, suspend, etc). - Core support for SCS, should other architectures want to use it too. - SCS overflow checking on context-switch as part of the existing stack limit check if CONFIG_SCHED_STACK_END_CHECK=y. CPU feature detection: - Removed numerous "SANITY CHECK" errors when running on a system with mismatched AArch32 support at EL1. This is primarily a concern for KVM, which disabled support for 32-bit guests on such a system. - Addition of new ID registers and fields as the architecture has been extended. Perf and PMU drivers: - Minor fixes and cleanups to system PMU drivers. Hardware errata: - Unify KVM workarounds for VHE and nVHE configurations. - Sort vendor errata entries in Kconfig. Secure Monitor Call Calling Convention (SMCCC): - Update to the latest specification from Arm (v1.2). - Allow PSCI code to query the SMCCC version. Software Delegated Exception Interface (SDEI): - Unexport a bunch of unused symbols. - Minor fixes to handling of firmware data. Pointer authentication: - Add support for dumping the kernel PAC mask in vmcoreinfo so that the stack can be unwound by tools such as kdump. - Simplification of key initialisation during CPU bringup. BPF backend: - Improve immediate generation for logical and add/sub instructions. vDSO: - Minor fixes to the linker flags for consistency with other architectures and support for LLVM's unwinder. - Clean up logic to initialise and map the vDSO into userspace. ACPI: - Work around for an ambiguity in the IORT specification relating to the "num_ids" field. - Support _DMA method for all named components rather than only PCIe root complexes. - Minor other IORT-related fixes. Miscellaneous: - Initialise debug traps early for KGDB and fix KDB cacheflushing deadlock. - Minor tweaks to early boot state (documentation update, set TEXT_OFFSET to 0x0, increase alignment of PE/COFF sections). - Refactoring and cleanup" * tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: (148 commits) KVM: arm64: Move __load_guest_stage2 to kvm_mmu.h KVM: arm64: Check advertised Stage-2 page size capability arm64/cpufeature: Add get_arm64_ftr_reg_nowarn() ACPI/IORT: Remove the unused __get_pci_rid() arm64/cpuinfo: Add ID_MMFR4_EL1 into the cpuinfo_arm64 context arm64/cpufeature: Add remaining feature bits in ID_AA64PFR1 register arm64/cpufeature: Add remaining feature bits in ID_AA64PFR0 register arm64/cpufeature: Add remaining feature bits in ID_AA64ISAR0 register arm64/cpufeature: Add remaining feature bits in ID_MMFR4 register arm64/cpufeature: Add remaining feature bits in ID_PFR0 register arm64/cpufeature: Introduce ID_MMFR5 CPU register arm64/cpufeature: Introduce ID_DFR1 CPU register arm64/cpufeature: Introduce ID_PFR2 CPU register arm64/cpufeature: Make doublelock a signed feature in ID_AA64DFR0 arm64/cpufeature: Drop TraceFilt feature exposure from ID_DFR0 register arm64/cpufeature: Add explicit ftr_id_isar0[] for ID_ISAR0 register arm64: mm: Add asid_gen_match() helper firmware: smccc: Fix missing prototype warning for arm_smccc_version_init arm64: vdso: Fix CFI directives in sigreturn trampoline arm64: vdso: Don't prefix sigreturn trampoline with a BTI C instruction ...
239 lines
5.8 KiB
C
239 lines
5.8 KiB
C
// SPDX-License-Identifier: GPL-2.0
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// Copyright (C) 2017 Arm Ltd.
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#define pr_fmt(fmt) "sdei: " fmt
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#include <linux/arm-smccc.h>
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#include <linux/arm_sdei.h>
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#include <linux/hardirq.h>
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#include <linux/irqflags.h>
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#include <linux/sched/task_stack.h>
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#include <linux/uaccess.h>
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#include <asm/alternative.h>
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#include <asm/kprobes.h>
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#include <asm/mmu.h>
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#include <asm/ptrace.h>
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#include <asm/sections.h>
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#include <asm/stacktrace.h>
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#include <asm/sysreg.h>
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#include <asm/vmap_stack.h>
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unsigned long sdei_exit_mode;
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/*
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* VMAP'd stacks checking for stack overflow on exception using sp as a scratch
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* register, meaning SDEI has to switch to its own stack. We need two stacks as
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* a critical event may interrupt a normal event that has just taken a
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* synchronous exception, and is using sp as scratch register. For a critical
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* event interrupting a normal event, we can't reliably tell if we were on the
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* sdei stack.
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* For now, we allocate stacks when the driver is probed.
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*/
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DECLARE_PER_CPU(unsigned long *, sdei_stack_normal_ptr);
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DECLARE_PER_CPU(unsigned long *, sdei_stack_critical_ptr);
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#ifdef CONFIG_VMAP_STACK
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DEFINE_PER_CPU(unsigned long *, sdei_stack_normal_ptr);
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DEFINE_PER_CPU(unsigned long *, sdei_stack_critical_ptr);
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#endif
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static void _free_sdei_stack(unsigned long * __percpu *ptr, int cpu)
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{
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unsigned long *p;
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p = per_cpu(*ptr, cpu);
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if (p) {
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per_cpu(*ptr, cpu) = NULL;
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vfree(p);
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}
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}
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static void free_sdei_stacks(void)
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{
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int cpu;
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for_each_possible_cpu(cpu) {
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_free_sdei_stack(&sdei_stack_normal_ptr, cpu);
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_free_sdei_stack(&sdei_stack_critical_ptr, cpu);
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}
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}
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static int _init_sdei_stack(unsigned long * __percpu *ptr, int cpu)
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{
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unsigned long *p;
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p = arch_alloc_vmap_stack(SDEI_STACK_SIZE, cpu_to_node(cpu));
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if (!p)
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return -ENOMEM;
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per_cpu(*ptr, cpu) = p;
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return 0;
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}
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static int init_sdei_stacks(void)
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{
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int cpu;
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int err = 0;
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for_each_possible_cpu(cpu) {
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err = _init_sdei_stack(&sdei_stack_normal_ptr, cpu);
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if (err)
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break;
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err = _init_sdei_stack(&sdei_stack_critical_ptr, cpu);
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if (err)
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break;
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}
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if (err)
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free_sdei_stacks();
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return err;
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}
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static bool on_sdei_normal_stack(unsigned long sp, struct stack_info *info)
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{
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unsigned long low = (unsigned long)raw_cpu_read(sdei_stack_normal_ptr);
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unsigned long high = low + SDEI_STACK_SIZE;
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return on_stack(sp, low, high, STACK_TYPE_SDEI_NORMAL, info);
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}
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static bool on_sdei_critical_stack(unsigned long sp, struct stack_info *info)
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{
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unsigned long low = (unsigned long)raw_cpu_read(sdei_stack_critical_ptr);
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unsigned long high = low + SDEI_STACK_SIZE;
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return on_stack(sp, low, high, STACK_TYPE_SDEI_CRITICAL, info);
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}
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bool _on_sdei_stack(unsigned long sp, struct stack_info *info)
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{
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if (!IS_ENABLED(CONFIG_VMAP_STACK))
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return false;
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if (on_sdei_critical_stack(sp, info))
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return true;
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if (on_sdei_normal_stack(sp, info))
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return true;
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return false;
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}
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unsigned long sdei_arch_get_entry_point(int conduit)
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{
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/*
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* SDEI works between adjacent exception levels. If we booted at EL1 we
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* assume a hypervisor is marshalling events. If we booted at EL2 and
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* dropped to EL1 because we don't support VHE, then we can't support
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* SDEI.
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*/
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if (is_hyp_mode_available() && !is_kernel_in_hyp_mode()) {
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pr_err("Not supported on this hardware/boot configuration\n");
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return 0;
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}
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if (IS_ENABLED(CONFIG_VMAP_STACK)) {
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if (init_sdei_stacks())
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return 0;
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}
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sdei_exit_mode = (conduit == SMCCC_CONDUIT_HVC) ? SDEI_EXIT_HVC : SDEI_EXIT_SMC;
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#ifdef CONFIG_UNMAP_KERNEL_AT_EL0
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if (arm64_kernel_unmapped_at_el0()) {
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unsigned long offset;
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offset = (unsigned long)__sdei_asm_entry_trampoline -
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(unsigned long)__entry_tramp_text_start;
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return TRAMP_VALIAS + offset;
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} else
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#endif /* CONFIG_UNMAP_KERNEL_AT_EL0 */
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return (unsigned long)__sdei_asm_handler;
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}
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/*
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* __sdei_handler() returns one of:
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* SDEI_EV_HANDLED - success, return to the interrupted context.
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* SDEI_EV_FAILED - failure, return this error code to firmare.
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* virtual-address - success, return to this address.
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*/
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static __kprobes unsigned long _sdei_handler(struct pt_regs *regs,
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struct sdei_registered_event *arg)
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{
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u32 mode;
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int i, err = 0;
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int clobbered_registers = 4;
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u64 elr = read_sysreg(elr_el1);
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u32 kernel_mode = read_sysreg(CurrentEL) | 1; /* +SPSel */
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unsigned long vbar = read_sysreg(vbar_el1);
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if (arm64_kernel_unmapped_at_el0())
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clobbered_registers++;
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/* Retrieve the missing registers values */
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for (i = 0; i < clobbered_registers; i++) {
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/* from within the handler, this call always succeeds */
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sdei_api_event_context(i, ®s->regs[i]);
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}
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/*
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* We didn't take an exception to get here, set PAN. UAO will be cleared
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* by sdei_event_handler()s set_fs(USER_DS) call.
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*/
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__uaccess_enable_hw_pan();
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err = sdei_event_handler(regs, arg);
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if (err)
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return SDEI_EV_FAILED;
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if (elr != read_sysreg(elr_el1)) {
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/*
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* We took a synchronous exception from the SDEI handler.
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* This could deadlock, and if you interrupt KVM it will
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* hyp-panic instead.
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*/
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pr_warn("unsafe: exception during handler\n");
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}
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mode = regs->pstate & (PSR_MODE32_BIT | PSR_MODE_MASK);
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/*
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* If we interrupted the kernel with interrupts masked, we always go
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* back to wherever we came from.
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*/
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if (mode == kernel_mode && !interrupts_enabled(regs))
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return SDEI_EV_HANDLED;
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/*
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* Otherwise, we pretend this was an IRQ. This lets user space tasks
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* receive signals before we return to them, and KVM to invoke it's
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* world switch to do the same.
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*
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* See DDI0487B.a Table D1-7 'Vector offsets from vector table base
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* address'.
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*/
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if (mode == kernel_mode)
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return vbar + 0x280;
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else if (mode & PSR_MODE32_BIT)
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return vbar + 0x680;
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return vbar + 0x480;
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}
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asmlinkage __kprobes notrace unsigned long
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__sdei_handler(struct pt_regs *regs, struct sdei_registered_event *arg)
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{
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unsigned long ret;
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nmi_enter();
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ret = _sdei_handler(regs, arg);
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nmi_exit();
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return ret;
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}
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