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4828b5f56f
The recently added MIPS cacheinfo support used a macro populate_cache()
to populate the cacheinfo structures depending on which caches are
present. However the macro contains multiple statements without
enclosing them in a do {} while (0) loop, so the L2 and L3 cache
conditionals in populate_cache_leaves() only conditionalised the first
statement in the macro.
This overflows the buffer allocated by detect_cache_attributes(),
resulting in boot failures under QEMU where neither the L2 or L2 caches
are present.
Enclose the macro statements in a do {} while (0) block to keep the
whole macro inside the conditionals.
Fixes: ef462f3b64 ("MIPS: Add cacheinfo support")
Reported-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: James Hogan <james.hogan@imgtec.com>
Tested-by: Guenter Roeck <linux@roeck-us.net>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Justin Chen <justin.chen@broadcom.com>
Cc: Florian Fainelli <f.fainelli@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: bcm-kernel-feedback-list@broadcom.com
Patchwork: https://patchwork.linux-mips.org/patch/15276/
88 lines
2.3 KiB
C
88 lines
2.3 KiB
C
/*
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* MIPS cacheinfo support
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed "as is" WITHOUT ANY WARRANTY of any
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* kind, whether express or implied; without even the implied warranty
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* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <linux/cacheinfo.h>
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/* Populates leaf and increments to next leaf */
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#define populate_cache(cache, leaf, c_level, c_type) \
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do { \
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leaf->type = c_type; \
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leaf->level = c_level; \
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leaf->coherency_line_size = c->cache.linesz; \
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leaf->number_of_sets = c->cache.sets; \
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leaf->ways_of_associativity = c->cache.ways; \
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leaf->size = c->cache.linesz * c->cache.sets * \
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c->cache.ways; \
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leaf++; \
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} while (0)
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static int __init_cache_level(unsigned int cpu)
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{
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struct cpuinfo_mips *c = ¤t_cpu_data;
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struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu);
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int levels = 0, leaves = 0;
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/*
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* If Dcache is not set, we assume the cache structures
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* are not properly initialized.
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*/
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if (c->dcache.waysize)
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levels += 1;
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else
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return -ENOENT;
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leaves += (c->icache.waysize) ? 2 : 1;
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if (c->scache.waysize) {
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levels++;
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leaves++;
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}
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if (c->tcache.waysize) {
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levels++;
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leaves++;
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}
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this_cpu_ci->num_levels = levels;
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this_cpu_ci->num_leaves = leaves;
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return 0;
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}
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static int __populate_cache_leaves(unsigned int cpu)
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{
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struct cpuinfo_mips *c = ¤t_cpu_data;
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struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu);
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struct cacheinfo *this_leaf = this_cpu_ci->info_list;
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if (c->icache.waysize) {
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populate_cache(dcache, this_leaf, 1, CACHE_TYPE_DATA);
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populate_cache(icache, this_leaf, 1, CACHE_TYPE_INST);
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} else {
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populate_cache(dcache, this_leaf, 1, CACHE_TYPE_UNIFIED);
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}
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if (c->scache.waysize)
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populate_cache(scache, this_leaf, 2, CACHE_TYPE_UNIFIED);
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if (c->tcache.waysize)
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populate_cache(tcache, this_leaf, 3, CACHE_TYPE_UNIFIED);
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return 0;
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}
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DEFINE_SMP_CALL_CACHE_FUNCTION(init_cache_level)
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DEFINE_SMP_CALL_CACHE_FUNCTION(populate_cache_leaves)
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