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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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af866496c7
Signed-off-by: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Cc: netdev@vger.kernel.org Cc: devel@driverdev.osuosl.org Acked-by: Greg Kroah-Hartman <gregkh@suse.de> Patchwork: https://patchwork.linux-mips.org/patch/2942/ Patchwork: https://patchwork.linux-mips.org/patch/3012/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
307 lines
9.2 KiB
C
307 lines
9.2 KiB
C
/***********************license start***************
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* Author: Cavium Networks
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*
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* Contact: support@caviumnetworks.com
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* This file is part of the OCTEON SDK
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*
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* Copyright (c) 2003-2008 Cavium Networks
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*
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* This file is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License, Version 2, as
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* published by the Free Software Foundation.
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*
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* This file is distributed in the hope that it will be useful, but
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* AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
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* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or
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* NONINFRINGEMENT. See the GNU General Public License for more
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* details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this file; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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* or visit http://www.gnu.org/licenses/.
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*
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* This file may also be available under a different license from Cavium.
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* Contact Cavium Networks for more information
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***********************license end**************************************/
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/*
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* Support functions for managing command queues used for
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* various hardware blocks.
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*/
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#include <linux/kernel.h>
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#include <asm/octeon/octeon.h>
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#include <asm/octeon/cvmx-config.h>
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#include <asm/octeon/cvmx-fpa.h>
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#include <asm/octeon/cvmx-cmd-queue.h>
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#include <asm/octeon/cvmx-npei-defs.h>
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#include <asm/octeon/cvmx-pexp-defs.h>
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#include <asm/octeon/cvmx-pko-defs.h>
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/**
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* This application uses this pointer to access the global queue
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* state. It points to a bootmem named block.
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*/
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__cvmx_cmd_queue_all_state_t *__cvmx_cmd_queue_state_ptr;
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/**
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* Initialize the Global queue state pointer.
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*
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* Returns CVMX_CMD_QUEUE_SUCCESS or a failure code
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*/
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static cvmx_cmd_queue_result_t __cvmx_cmd_queue_init_state_ptr(void)
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{
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char *alloc_name = "cvmx_cmd_queues";
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#if defined(CONFIG_CAVIUM_RESERVE32) && CONFIG_CAVIUM_RESERVE32
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extern uint64_t octeon_reserve32_memory;
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#endif
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if (likely(__cvmx_cmd_queue_state_ptr))
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return CVMX_CMD_QUEUE_SUCCESS;
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#if defined(CONFIG_CAVIUM_RESERVE32) && CONFIG_CAVIUM_RESERVE32
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if (octeon_reserve32_memory)
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__cvmx_cmd_queue_state_ptr =
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cvmx_bootmem_alloc_named_range(sizeof(*__cvmx_cmd_queue_state_ptr),
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octeon_reserve32_memory,
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octeon_reserve32_memory +
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(CONFIG_CAVIUM_RESERVE32 <<
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20) - 1, 128, alloc_name);
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else
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#endif
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__cvmx_cmd_queue_state_ptr =
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cvmx_bootmem_alloc_named(sizeof(*__cvmx_cmd_queue_state_ptr),
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128,
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alloc_name);
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if (__cvmx_cmd_queue_state_ptr)
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memset(__cvmx_cmd_queue_state_ptr, 0,
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sizeof(*__cvmx_cmd_queue_state_ptr));
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else {
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struct cvmx_bootmem_named_block_desc *block_desc =
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cvmx_bootmem_find_named_block(alloc_name);
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if (block_desc)
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__cvmx_cmd_queue_state_ptr =
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cvmx_phys_to_ptr(block_desc->base_addr);
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else {
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cvmx_dprintf
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("ERROR: cvmx_cmd_queue_initialize: Unable to get named block %s.\n",
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alloc_name);
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return CVMX_CMD_QUEUE_NO_MEMORY;
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}
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}
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return CVMX_CMD_QUEUE_SUCCESS;
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}
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/**
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* Initialize a command queue for use. The initial FPA buffer is
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* allocated and the hardware unit is configured to point to the
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* new command queue.
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*
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* @queue_id: Hardware command queue to initialize.
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* @max_depth: Maximum outstanding commands that can be queued.
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* @fpa_pool: FPA pool the command queues should come from.
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* @pool_size: Size of each buffer in the FPA pool (bytes)
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*
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* Returns CVMX_CMD_QUEUE_SUCCESS or a failure code
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*/
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cvmx_cmd_queue_result_t cvmx_cmd_queue_initialize(cvmx_cmd_queue_id_t queue_id,
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int max_depth, int fpa_pool,
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int pool_size)
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{
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__cvmx_cmd_queue_state_t *qstate;
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cvmx_cmd_queue_result_t result = __cvmx_cmd_queue_init_state_ptr();
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if (result != CVMX_CMD_QUEUE_SUCCESS)
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return result;
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qstate = __cvmx_cmd_queue_get_state(queue_id);
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if (qstate == NULL)
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return CVMX_CMD_QUEUE_INVALID_PARAM;
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/*
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* We artificially limit max_depth to 1<<20 words. It is an
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* arbitrary limit.
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*/
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if (CVMX_CMD_QUEUE_ENABLE_MAX_DEPTH) {
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if ((max_depth < 0) || (max_depth > 1 << 20))
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return CVMX_CMD_QUEUE_INVALID_PARAM;
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} else if (max_depth != 0)
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return CVMX_CMD_QUEUE_INVALID_PARAM;
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if ((fpa_pool < 0) || (fpa_pool > 7))
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return CVMX_CMD_QUEUE_INVALID_PARAM;
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if ((pool_size < 128) || (pool_size > 65536))
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return CVMX_CMD_QUEUE_INVALID_PARAM;
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/* See if someone else has already initialized the queue */
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if (qstate->base_ptr_div128) {
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if (max_depth != (int)qstate->max_depth) {
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cvmx_dprintf("ERROR: cvmx_cmd_queue_initialize: "
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"Queue already initialized with different "
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"max_depth (%d).\n",
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(int)qstate->max_depth);
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return CVMX_CMD_QUEUE_INVALID_PARAM;
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}
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if (fpa_pool != qstate->fpa_pool) {
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cvmx_dprintf("ERROR: cvmx_cmd_queue_initialize: "
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"Queue already initialized with different "
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"FPA pool (%u).\n",
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qstate->fpa_pool);
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return CVMX_CMD_QUEUE_INVALID_PARAM;
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}
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if ((pool_size >> 3) - 1 != qstate->pool_size_m1) {
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cvmx_dprintf("ERROR: cvmx_cmd_queue_initialize: "
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"Queue already initialized with different "
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"FPA pool size (%u).\n",
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(qstate->pool_size_m1 + 1) << 3);
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return CVMX_CMD_QUEUE_INVALID_PARAM;
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}
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CVMX_SYNCWS;
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return CVMX_CMD_QUEUE_ALREADY_SETUP;
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} else {
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union cvmx_fpa_ctl_status status;
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void *buffer;
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status.u64 = cvmx_read_csr(CVMX_FPA_CTL_STATUS);
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if (!status.s.enb) {
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cvmx_dprintf("ERROR: cvmx_cmd_queue_initialize: "
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"FPA is not enabled.\n");
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return CVMX_CMD_QUEUE_NO_MEMORY;
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}
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buffer = cvmx_fpa_alloc(fpa_pool);
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if (buffer == NULL) {
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cvmx_dprintf("ERROR: cvmx_cmd_queue_initialize: "
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"Unable to allocate initial buffer.\n");
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return CVMX_CMD_QUEUE_NO_MEMORY;
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}
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memset(qstate, 0, sizeof(*qstate));
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qstate->max_depth = max_depth;
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qstate->fpa_pool = fpa_pool;
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qstate->pool_size_m1 = (pool_size >> 3) - 1;
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qstate->base_ptr_div128 = cvmx_ptr_to_phys(buffer) / 128;
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/*
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* We zeroed the now serving field so we need to also
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* zero the ticket.
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*/
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__cvmx_cmd_queue_state_ptr->
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ticket[__cvmx_cmd_queue_get_index(queue_id)] = 0;
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CVMX_SYNCWS;
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return CVMX_CMD_QUEUE_SUCCESS;
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}
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}
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/**
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* Shutdown a queue a free it's command buffers to the FPA. The
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* hardware connected to the queue must be stopped before this
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* function is called.
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*
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* @queue_id: Queue to shutdown
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*
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* Returns CVMX_CMD_QUEUE_SUCCESS or a failure code
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*/
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cvmx_cmd_queue_result_t cvmx_cmd_queue_shutdown(cvmx_cmd_queue_id_t queue_id)
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{
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__cvmx_cmd_queue_state_t *qptr = __cvmx_cmd_queue_get_state(queue_id);
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if (qptr == NULL) {
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cvmx_dprintf("ERROR: cvmx_cmd_queue_shutdown: Unable to "
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"get queue information.\n");
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return CVMX_CMD_QUEUE_INVALID_PARAM;
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}
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if (cvmx_cmd_queue_length(queue_id) > 0) {
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cvmx_dprintf("ERROR: cvmx_cmd_queue_shutdown: Queue still "
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"has data in it.\n");
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return CVMX_CMD_QUEUE_FULL;
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}
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__cvmx_cmd_queue_lock(queue_id, qptr);
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if (qptr->base_ptr_div128) {
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cvmx_fpa_free(cvmx_phys_to_ptr
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((uint64_t) qptr->base_ptr_div128 << 7),
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qptr->fpa_pool, 0);
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qptr->base_ptr_div128 = 0;
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}
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__cvmx_cmd_queue_unlock(qptr);
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return CVMX_CMD_QUEUE_SUCCESS;
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}
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/**
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* Return the number of command words pending in the queue. This
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* function may be relatively slow for some hardware units.
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*
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* @queue_id: Hardware command queue to query
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*
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* Returns Number of outstanding commands
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*/
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int cvmx_cmd_queue_length(cvmx_cmd_queue_id_t queue_id)
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{
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if (CVMX_ENABLE_PARAMETER_CHECKING) {
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if (__cvmx_cmd_queue_get_state(queue_id) == NULL)
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return CVMX_CMD_QUEUE_INVALID_PARAM;
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}
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/*
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* The cast is here so gcc with check that all values in the
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* cvmx_cmd_queue_id_t enumeration are here.
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*/
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switch ((cvmx_cmd_queue_id_t) (queue_id & 0xff0000)) {
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case CVMX_CMD_QUEUE_PKO_BASE:
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/*
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* FIXME: Need atomic lock on
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* CVMX_PKO_REG_READ_IDX. Right now we are normally
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* called with the queue lock, so that is a SLIGHT
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* amount of protection.
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*/
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cvmx_write_csr(CVMX_PKO_REG_READ_IDX, queue_id & 0xffff);
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if (OCTEON_IS_MODEL(OCTEON_CN3XXX)) {
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union cvmx_pko_mem_debug9 debug9;
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debug9.u64 = cvmx_read_csr(CVMX_PKO_MEM_DEBUG9);
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return debug9.cn38xx.doorbell;
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} else {
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union cvmx_pko_mem_debug8 debug8;
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debug8.u64 = cvmx_read_csr(CVMX_PKO_MEM_DEBUG8);
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return debug8.cn58xx.doorbell;
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}
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case CVMX_CMD_QUEUE_ZIP:
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case CVMX_CMD_QUEUE_DFA:
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case CVMX_CMD_QUEUE_RAID:
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/* FIXME: Implement other lengths */
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return 0;
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case CVMX_CMD_QUEUE_DMA_BASE:
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{
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union cvmx_npei_dmax_counts dmax_counts;
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dmax_counts.u64 =
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cvmx_read_csr(CVMX_PEXP_NPEI_DMAX_COUNTS
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(queue_id & 0x7));
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return dmax_counts.s.dbell;
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}
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case CVMX_CMD_QUEUE_END:
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return CVMX_CMD_QUEUE_INVALID_PARAM;
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}
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return CVMX_CMD_QUEUE_INVALID_PARAM;
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}
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/**
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* Return the command buffer to be written to. The purpose of this
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* function is to allow CVMX routine access t othe low level buffer
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* for initial hardware setup. User applications should not call this
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* function directly.
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*
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* @queue_id: Command queue to query
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*
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* Returns Command buffer or NULL on failure
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*/
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void *cvmx_cmd_queue_buffer(cvmx_cmd_queue_id_t queue_id)
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{
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__cvmx_cmd_queue_state_t *qptr = __cvmx_cmd_queue_get_state(queue_id);
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if (qptr && qptr->base_ptr_div128)
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return cvmx_phys_to_ptr((uint64_t) qptr->base_ptr_div128 << 7);
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else
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return NULL;
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}
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