Tomi Valkeinen d80e02ef34 OMAPDSS: Fix writes to DISPC_POL_FREQ ... When omapdss writes to DISPC_POL_FREQ register, it always ORs the bits with the current contents of the register, never clearing the old ones, causing wrong signal polarity settings. As we write all the bits in DISPC_POL_FREQ, we don't need to care about the current contents of the register. So fix the issue by constructing new register value from scratch. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>		2014-05-09 15:28:39 +03:00
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backlight	- Call put_device() instead of kfree() - core	2014-04-10 08:52:35 -07:00
console	video: move fbdev to drivers/video/fbdev	2014-04-17 08:10:19 +03:00
fbdev	OMAPDSS: Fix writes to DISPC_POL_FREQ	2014-05-09 15:28:39 +03:00
logo	x86, platforms: Remove SGI Visual Workstation	2014-02-27 08:07:39 -08:00
display_timing.c	video: add display_timing and videomode	2013-01-24 09:03:04 +01:00
hdmi.c	video/hdmi: Rename HDMI_IDENTIFIER to HDMI_IEEE_OUI	2013-08-30 08:42:01 +10:00
Kconfig	video: Kconfig: move drm and fb into separate menus	2014-04-17 08:10:20 +03:00
Makefile	video: move fbdev to drivers/video/fbdev	2014-04-17 08:10:19 +03:00
of_display_timing.c	video: of: display_timing: correct display-timings node finding	2013-09-26 12:31:42 +03:00
of_videomode.c	videomode: videomode_from_timing work	2013-03-21 14:34:33 +02:00
vgastate.c
videomode.c	videomode: videomode_from_timing work	2013-03-21 14:34:33 +02:00