mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-30 00:16:44 +07:00
62f1b2465b
- remove __{,test_and_}{set,clear,change}_bit() and test_bit()
- remove __ffs()
- remove find_{next,first}{,_zero}_bit()
- remove generic_hweight{32,16,8}()
- remove sched_find_first_bit()
- remove generic_ffs()
- remove ext2_{set,clear,test,find_first_zero,find_next_zero}_bit()
- remove ext2_{set,clear}_bit_atomic()
- remove minix_{test,set,test_and_clear,test,find_first_zero}_bit()
- remove generic_fls()
- remove generic_fls64()
Signed-off-by: Akinobu Mita <mita@miraclelinux.com>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: Richard Curnow <rc@rc0.org.uk>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
150 lines
3.3 KiB
C
150 lines
3.3 KiB
C
#ifndef __ASM_SH64_BITOPS_H
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#define __ASM_SH64_BITOPS_H
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/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* include/asm-sh64/bitops.h
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*
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* Copyright (C) 2000, 2001 Paolo Alberelli
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* Copyright (C) 2003 Paul Mundt
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*/
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#ifdef __KERNEL__
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#include <linux/compiler.h>
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#include <asm/system.h>
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/* For __swab32 */
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#include <asm/byteorder.h>
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static __inline__ void set_bit(int nr, volatile void * addr)
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{
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int mask;
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volatile unsigned int *a = addr;
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unsigned long flags;
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a += nr >> 5;
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mask = 1 << (nr & 0x1f);
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local_irq_save(flags);
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*a |= mask;
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local_irq_restore(flags);
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}
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/*
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* clear_bit() doesn't provide any barrier for the compiler.
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*/
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#define smp_mb__before_clear_bit() barrier()
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#define smp_mb__after_clear_bit() barrier()
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static inline void clear_bit(int nr, volatile unsigned long *a)
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{
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int mask;
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unsigned long flags;
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a += nr >> 5;
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mask = 1 << (nr & 0x1f);
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local_irq_save(flags);
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*a &= ~mask;
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local_irq_restore(flags);
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}
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static __inline__ void change_bit(int nr, volatile void * addr)
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{
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int mask;
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volatile unsigned int *a = addr;
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unsigned long flags;
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a += nr >> 5;
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mask = 1 << (nr & 0x1f);
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local_irq_save(flags);
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*a ^= mask;
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local_irq_restore(flags);
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}
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static __inline__ int test_and_set_bit(int nr, volatile void * addr)
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{
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int mask, retval;
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volatile unsigned int *a = addr;
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unsigned long flags;
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a += nr >> 5;
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mask = 1 << (nr & 0x1f);
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local_irq_save(flags);
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retval = (mask & *a) != 0;
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*a |= mask;
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local_irq_restore(flags);
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return retval;
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}
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static __inline__ int test_and_clear_bit(int nr, volatile void * addr)
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{
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int mask, retval;
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volatile unsigned int *a = addr;
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unsigned long flags;
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a += nr >> 5;
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mask = 1 << (nr & 0x1f);
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local_irq_save(flags);
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retval = (mask & *a) != 0;
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*a &= ~mask;
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local_irq_restore(flags);
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return retval;
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}
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static __inline__ int test_and_change_bit(int nr, volatile void * addr)
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{
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int mask, retval;
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volatile unsigned int *a = addr;
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unsigned long flags;
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a += nr >> 5;
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mask = 1 << (nr & 0x1f);
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local_irq_save(flags);
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retval = (mask & *a) != 0;
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*a ^= mask;
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local_irq_restore(flags);
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return retval;
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}
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#include <asm-generic/bitops/non-atomic.h>
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static __inline__ unsigned long ffz(unsigned long word)
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{
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unsigned long result, __d2, __d3;
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__asm__("gettr tr0, %2\n\t"
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"pta $+32, tr0\n\t"
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"andi %1, 1, %3\n\t"
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"beq %3, r63, tr0\n\t"
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"pta $+4, tr0\n"
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"0:\n\t"
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"shlri.l %1, 1, %1\n\t"
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"addi %0, 1, %0\n\t"
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"andi %1, 1, %3\n\t"
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"beqi %3, 1, tr0\n"
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"1:\n\t"
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"ptabs %2, tr0\n\t"
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: "=r" (result), "=r" (word), "=r" (__d2), "=r" (__d3)
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: "0" (0L), "1" (word));
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return result;
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}
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#include <asm-generic/bitops/__ffs.h>
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#include <asm-generic/bitops/find.h>
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#include <asm-generic/bitops/hweight.h>
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#include <asm-generic/bitops/sched.h>
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#include <asm-generic/bitops/ffs.h>
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#include <asm-generic/bitops/ext2-non-atomic.h>
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#include <asm-generic/bitops/ext2-atomic.h>
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#include <asm-generic/bitops/minix.h>
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#include <asm-generic/bitops/fls.h>
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#include <asm-generic/bitops/fls64.h>
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#endif /* __KERNEL__ */
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#endif /* __ASM_SH64_BITOPS_H */
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