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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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ad78343e40
Use %ptR instead of open coded variant to print content of struct rtc_time in human readable format. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
499 lines
13 KiB
C
499 lines
13 KiB
C
/*
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* ST M48T59 RTC driver
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*
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* Copyright (c) 2007 Wind River Systems, Inc.
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*
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* Author: Mark Zhan <rongkai.zhan@windriver.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/io.h>
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#include <linux/device.h>
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#include <linux/platform_device.h>
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#include <linux/rtc.h>
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#include <linux/rtc/m48t59.h>
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#include <linux/bcd.h>
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#include <linux/slab.h>
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#ifndef NO_IRQ
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#define NO_IRQ (-1)
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#endif
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#define M48T59_READ(reg) (pdata->read_byte(dev, pdata->offset + reg))
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#define M48T59_WRITE(val, reg) \
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(pdata->write_byte(dev, pdata->offset + reg, val))
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#define M48T59_SET_BITS(mask, reg) \
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M48T59_WRITE((M48T59_READ(reg) | (mask)), (reg))
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#define M48T59_CLEAR_BITS(mask, reg) \
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M48T59_WRITE((M48T59_READ(reg) & ~(mask)), (reg))
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struct m48t59_private {
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void __iomem *ioaddr;
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int irq;
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struct rtc_device *rtc;
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spinlock_t lock; /* serialize the NVRAM and RTC access */
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};
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/*
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* This is the generic access method when the chip is memory-mapped
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*/
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static void
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m48t59_mem_writeb(struct device *dev, u32 ofs, u8 val)
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{
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struct m48t59_private *m48t59 = dev_get_drvdata(dev);
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writeb(val, m48t59->ioaddr+ofs);
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}
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static u8
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m48t59_mem_readb(struct device *dev, u32 ofs)
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{
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struct m48t59_private *m48t59 = dev_get_drvdata(dev);
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return readb(m48t59->ioaddr+ofs);
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}
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/*
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* NOTE: M48T59 only uses BCD mode
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*/
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static int m48t59_rtc_read_time(struct device *dev, struct rtc_time *tm)
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{
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struct m48t59_plat_data *pdata = dev_get_platdata(dev);
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struct m48t59_private *m48t59 = dev_get_drvdata(dev);
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unsigned long flags;
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u8 val;
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spin_lock_irqsave(&m48t59->lock, flags);
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/* Issue the READ command */
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M48T59_SET_BITS(M48T59_CNTL_READ, M48T59_CNTL);
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tm->tm_year = bcd2bin(M48T59_READ(M48T59_YEAR));
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/* tm_mon is 0-11 */
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tm->tm_mon = bcd2bin(M48T59_READ(M48T59_MONTH)) - 1;
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tm->tm_mday = bcd2bin(M48T59_READ(M48T59_MDAY));
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val = M48T59_READ(M48T59_WDAY);
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if ((pdata->type == M48T59RTC_TYPE_M48T59) &&
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(val & M48T59_WDAY_CEB) && (val & M48T59_WDAY_CB)) {
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dev_dbg(dev, "Century bit is enabled\n");
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tm->tm_year += 100; /* one century */
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}
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#ifdef CONFIG_SPARC
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/* Sun SPARC machines count years since 1968 */
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tm->tm_year += 68;
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#endif
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tm->tm_wday = bcd2bin(val & 0x07);
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tm->tm_hour = bcd2bin(M48T59_READ(M48T59_HOUR) & 0x3F);
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tm->tm_min = bcd2bin(M48T59_READ(M48T59_MIN) & 0x7F);
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tm->tm_sec = bcd2bin(M48T59_READ(M48T59_SEC) & 0x7F);
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/* Clear the READ bit */
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M48T59_CLEAR_BITS(M48T59_CNTL_READ, M48T59_CNTL);
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spin_unlock_irqrestore(&m48t59->lock, flags);
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dev_dbg(dev, "RTC read time %ptR\n", tm);
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return 0;
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}
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static int m48t59_rtc_set_time(struct device *dev, struct rtc_time *tm)
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{
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struct m48t59_plat_data *pdata = dev_get_platdata(dev);
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struct m48t59_private *m48t59 = dev_get_drvdata(dev);
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unsigned long flags;
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u8 val = 0;
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int year = tm->tm_year;
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#ifdef CONFIG_SPARC
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/* Sun SPARC machines count years since 1968 */
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year -= 68;
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#endif
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dev_dbg(dev, "RTC set time %04d-%02d-%02d %02d/%02d/%02d\n",
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year + 1900, tm->tm_mon, tm->tm_mday,
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tm->tm_hour, tm->tm_min, tm->tm_sec);
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if (year < 0)
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return -EINVAL;
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spin_lock_irqsave(&m48t59->lock, flags);
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/* Issue the WRITE command */
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M48T59_SET_BITS(M48T59_CNTL_WRITE, M48T59_CNTL);
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M48T59_WRITE((bin2bcd(tm->tm_sec) & 0x7F), M48T59_SEC);
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M48T59_WRITE((bin2bcd(tm->tm_min) & 0x7F), M48T59_MIN);
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M48T59_WRITE((bin2bcd(tm->tm_hour) & 0x3F), M48T59_HOUR);
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M48T59_WRITE((bin2bcd(tm->tm_mday) & 0x3F), M48T59_MDAY);
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/* tm_mon is 0-11 */
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M48T59_WRITE((bin2bcd(tm->tm_mon + 1) & 0x1F), M48T59_MONTH);
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M48T59_WRITE(bin2bcd(year % 100), M48T59_YEAR);
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if (pdata->type == M48T59RTC_TYPE_M48T59 && (year / 100))
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val = (M48T59_WDAY_CEB | M48T59_WDAY_CB);
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val |= (bin2bcd(tm->tm_wday) & 0x07);
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M48T59_WRITE(val, M48T59_WDAY);
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/* Clear the WRITE bit */
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M48T59_CLEAR_BITS(M48T59_CNTL_WRITE, M48T59_CNTL);
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spin_unlock_irqrestore(&m48t59->lock, flags);
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return 0;
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}
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/*
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* Read alarm time and date in RTC
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*/
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static int m48t59_rtc_readalarm(struct device *dev, struct rtc_wkalrm *alrm)
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{
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struct m48t59_plat_data *pdata = dev_get_platdata(dev);
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struct m48t59_private *m48t59 = dev_get_drvdata(dev);
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struct rtc_time *tm = &alrm->time;
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unsigned long flags;
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u8 val;
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/* If no irq, we don't support ALARM */
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if (m48t59->irq == NO_IRQ)
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return -EIO;
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spin_lock_irqsave(&m48t59->lock, flags);
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/* Issue the READ command */
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M48T59_SET_BITS(M48T59_CNTL_READ, M48T59_CNTL);
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tm->tm_year = bcd2bin(M48T59_READ(M48T59_YEAR));
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#ifdef CONFIG_SPARC
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/* Sun SPARC machines count years since 1968 */
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tm->tm_year += 68;
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#endif
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/* tm_mon is 0-11 */
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tm->tm_mon = bcd2bin(M48T59_READ(M48T59_MONTH)) - 1;
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val = M48T59_READ(M48T59_WDAY);
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if ((val & M48T59_WDAY_CEB) && (val & M48T59_WDAY_CB))
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tm->tm_year += 100; /* one century */
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tm->tm_mday = bcd2bin(M48T59_READ(M48T59_ALARM_DATE));
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tm->tm_hour = bcd2bin(M48T59_READ(M48T59_ALARM_HOUR));
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tm->tm_min = bcd2bin(M48T59_READ(M48T59_ALARM_MIN));
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tm->tm_sec = bcd2bin(M48T59_READ(M48T59_ALARM_SEC));
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/* Clear the READ bit */
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M48T59_CLEAR_BITS(M48T59_CNTL_READ, M48T59_CNTL);
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spin_unlock_irqrestore(&m48t59->lock, flags);
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dev_dbg(dev, "RTC read alarm time %ptR\n", tm);
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return rtc_valid_tm(tm);
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}
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/*
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* Set alarm time and date in RTC
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*/
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static int m48t59_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm)
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{
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struct m48t59_plat_data *pdata = dev_get_platdata(dev);
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struct m48t59_private *m48t59 = dev_get_drvdata(dev);
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struct rtc_time *tm = &alrm->time;
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u8 mday, hour, min, sec;
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unsigned long flags;
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int year = tm->tm_year;
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#ifdef CONFIG_SPARC
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/* Sun SPARC machines count years since 1968 */
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year -= 68;
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#endif
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/* If no irq, we don't support ALARM */
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if (m48t59->irq == NO_IRQ)
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return -EIO;
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if (year < 0)
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return -EINVAL;
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/*
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* 0xff means "always match"
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*/
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mday = tm->tm_mday;
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mday = (mday >= 1 && mday <= 31) ? bin2bcd(mday) : 0xff;
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if (mday == 0xff)
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mday = M48T59_READ(M48T59_MDAY);
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hour = tm->tm_hour;
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hour = (hour < 24) ? bin2bcd(hour) : 0x00;
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min = tm->tm_min;
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min = (min < 60) ? bin2bcd(min) : 0x00;
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sec = tm->tm_sec;
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sec = (sec < 60) ? bin2bcd(sec) : 0x00;
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spin_lock_irqsave(&m48t59->lock, flags);
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/* Issue the WRITE command */
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M48T59_SET_BITS(M48T59_CNTL_WRITE, M48T59_CNTL);
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M48T59_WRITE(mday, M48T59_ALARM_DATE);
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M48T59_WRITE(hour, M48T59_ALARM_HOUR);
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M48T59_WRITE(min, M48T59_ALARM_MIN);
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M48T59_WRITE(sec, M48T59_ALARM_SEC);
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/* Clear the WRITE bit */
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M48T59_CLEAR_BITS(M48T59_CNTL_WRITE, M48T59_CNTL);
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spin_unlock_irqrestore(&m48t59->lock, flags);
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dev_dbg(dev, "RTC set alarm time %04d-%02d-%02d %02d/%02d/%02d\n",
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year + 1900, tm->tm_mon, tm->tm_mday,
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tm->tm_hour, tm->tm_min, tm->tm_sec);
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return 0;
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}
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/*
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* Handle commands from user-space
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*/
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static int m48t59_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
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{
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struct m48t59_plat_data *pdata = dev_get_platdata(dev);
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struct m48t59_private *m48t59 = dev_get_drvdata(dev);
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unsigned long flags;
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spin_lock_irqsave(&m48t59->lock, flags);
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if (enabled)
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M48T59_WRITE(M48T59_INTR_AFE, M48T59_INTR);
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else
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M48T59_WRITE(0x00, M48T59_INTR);
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spin_unlock_irqrestore(&m48t59->lock, flags);
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return 0;
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}
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static int m48t59_rtc_proc(struct device *dev, struct seq_file *seq)
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{
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struct m48t59_plat_data *pdata = dev_get_platdata(dev);
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struct m48t59_private *m48t59 = dev_get_drvdata(dev);
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unsigned long flags;
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u8 val;
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spin_lock_irqsave(&m48t59->lock, flags);
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val = M48T59_READ(M48T59_FLAGS);
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spin_unlock_irqrestore(&m48t59->lock, flags);
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seq_printf(seq, "battery\t\t: %s\n",
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(val & M48T59_FLAGS_BF) ? "low" : "normal");
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return 0;
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}
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/*
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* IRQ handler for the RTC
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*/
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static irqreturn_t m48t59_rtc_interrupt(int irq, void *dev_id)
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{
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struct device *dev = (struct device *)dev_id;
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struct m48t59_plat_data *pdata = dev_get_platdata(dev);
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struct m48t59_private *m48t59 = dev_get_drvdata(dev);
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u8 event;
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spin_lock(&m48t59->lock);
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event = M48T59_READ(M48T59_FLAGS);
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spin_unlock(&m48t59->lock);
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if (event & M48T59_FLAGS_AF) {
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rtc_update_irq(m48t59->rtc, 1, (RTC_AF | RTC_IRQF));
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return IRQ_HANDLED;
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}
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return IRQ_NONE;
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}
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static const struct rtc_class_ops m48t59_rtc_ops = {
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.read_time = m48t59_rtc_read_time,
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.set_time = m48t59_rtc_set_time,
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.read_alarm = m48t59_rtc_readalarm,
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.set_alarm = m48t59_rtc_setalarm,
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.proc = m48t59_rtc_proc,
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.alarm_irq_enable = m48t59_rtc_alarm_irq_enable,
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};
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static const struct rtc_class_ops m48t02_rtc_ops = {
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.read_time = m48t59_rtc_read_time,
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.set_time = m48t59_rtc_set_time,
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};
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static int m48t59_nvram_read(void *priv, unsigned int offset, void *val,
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size_t size)
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{
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struct platform_device *pdev = priv;
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struct device *dev = &pdev->dev;
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struct m48t59_plat_data *pdata = dev_get_platdata(&pdev->dev);
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struct m48t59_private *m48t59 = platform_get_drvdata(pdev);
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ssize_t cnt = 0;
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unsigned long flags;
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u8 *buf = val;
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spin_lock_irqsave(&m48t59->lock, flags);
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for (; cnt < size; cnt++)
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*buf++ = M48T59_READ(cnt);
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spin_unlock_irqrestore(&m48t59->lock, flags);
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return 0;
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}
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static int m48t59_nvram_write(void *priv, unsigned int offset, void *val,
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size_t size)
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{
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struct platform_device *pdev = priv;
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struct device *dev = &pdev->dev;
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struct m48t59_plat_data *pdata = dev_get_platdata(&pdev->dev);
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struct m48t59_private *m48t59 = platform_get_drvdata(pdev);
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ssize_t cnt = 0;
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unsigned long flags;
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u8 *buf = val;
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spin_lock_irqsave(&m48t59->lock, flags);
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for (; cnt < size; cnt++)
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M48T59_WRITE(*buf++, cnt);
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spin_unlock_irqrestore(&m48t59->lock, flags);
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return 0;
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}
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static int m48t59_rtc_probe(struct platform_device *pdev)
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{
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struct m48t59_plat_data *pdata = dev_get_platdata(&pdev->dev);
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struct m48t59_private *m48t59 = NULL;
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struct resource *res;
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int ret = -ENOMEM;
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const struct rtc_class_ops *ops;
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struct nvmem_config nvmem_cfg = {
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.name = "m48t59-",
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.word_size = 1,
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.stride = 1,
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.reg_read = m48t59_nvram_read,
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.reg_write = m48t59_nvram_write,
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.priv = pdev,
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};
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/* This chip could be memory-mapped or I/O-mapped */
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (!res) {
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res = platform_get_resource(pdev, IORESOURCE_IO, 0);
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if (!res)
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return -EINVAL;
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}
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if (res->flags & IORESOURCE_IO) {
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/* If we are I/O-mapped, the platform should provide
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* the operations accessing chip registers.
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*/
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if (!pdata || !pdata->write_byte || !pdata->read_byte)
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return -EINVAL;
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} else if (res->flags & IORESOURCE_MEM) {
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/* we are memory-mapped */
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if (!pdata) {
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pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata),
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GFP_KERNEL);
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if (!pdata)
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return -ENOMEM;
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/* Ensure we only kmalloc platform data once */
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pdev->dev.platform_data = pdata;
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}
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if (!pdata->type)
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pdata->type = M48T59RTC_TYPE_M48T59;
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/* Try to use the generic memory read/write ops */
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if (!pdata->write_byte)
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pdata->write_byte = m48t59_mem_writeb;
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if (!pdata->read_byte)
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pdata->read_byte = m48t59_mem_readb;
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}
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m48t59 = devm_kzalloc(&pdev->dev, sizeof(*m48t59), GFP_KERNEL);
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if (!m48t59)
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return -ENOMEM;
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m48t59->ioaddr = pdata->ioaddr;
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if (!m48t59->ioaddr) {
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/* ioaddr not mapped externally */
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m48t59->ioaddr = devm_ioremap(&pdev->dev, res->start,
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resource_size(res));
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if (!m48t59->ioaddr)
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return ret;
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}
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/* Try to get irq number. We also can work in
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* the mode without IRQ.
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*/
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m48t59->irq = platform_get_irq(pdev, 0);
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if (m48t59->irq <= 0)
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m48t59->irq = NO_IRQ;
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if (m48t59->irq != NO_IRQ) {
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ret = devm_request_irq(&pdev->dev, m48t59->irq,
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m48t59_rtc_interrupt, IRQF_SHARED,
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"rtc-m48t59", &pdev->dev);
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if (ret)
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return ret;
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}
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switch (pdata->type) {
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case M48T59RTC_TYPE_M48T59:
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ops = &m48t59_rtc_ops;
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pdata->offset = 0x1ff0;
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break;
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case M48T59RTC_TYPE_M48T02:
|
|
ops = &m48t02_rtc_ops;
|
|
pdata->offset = 0x7f0;
|
|
break;
|
|
case M48T59RTC_TYPE_M48T08:
|
|
ops = &m48t02_rtc_ops;
|
|
pdata->offset = 0x1ff0;
|
|
break;
|
|
default:
|
|
dev_err(&pdev->dev, "Unknown RTC type\n");
|
|
return -ENODEV;
|
|
}
|
|
|
|
spin_lock_init(&m48t59->lock);
|
|
platform_set_drvdata(pdev, m48t59);
|
|
|
|
m48t59->rtc = devm_rtc_allocate_device(&pdev->dev);
|
|
if (IS_ERR(m48t59->rtc))
|
|
return PTR_ERR(m48t59->rtc);
|
|
|
|
m48t59->rtc->nvram_old_abi = true;
|
|
m48t59->rtc->ops = ops;
|
|
|
|
nvmem_cfg.size = pdata->offset;
|
|
ret = rtc_nvmem_register(m48t59->rtc, &nvmem_cfg);
|
|
if (ret)
|
|
return ret;
|
|
|
|
ret = rtc_register_device(m48t59->rtc);
|
|
if (ret)
|
|
return ret;
|
|
|
|
return 0;
|
|
}
|
|
|
|
/* work with hotplug and coldplug */
|
|
MODULE_ALIAS("platform:rtc-m48t59");
|
|
|
|
static struct platform_driver m48t59_rtc_driver = {
|
|
.driver = {
|
|
.name = "rtc-m48t59",
|
|
},
|
|
.probe = m48t59_rtc_probe,
|
|
};
|
|
|
|
module_platform_driver(m48t59_rtc_driver);
|
|
|
|
MODULE_AUTHOR("Mark Zhan <rongkai.zhan@windriver.com>");
|
|
MODULE_DESCRIPTION("M48T59/M48T02/M48T08 RTC driver");
|
|
MODULE_LICENSE("GPL");
|