mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-28 11:18:45 +07:00
e65a9e480e
With performance optimization the spi transfer and messages of basic
register operations like qcaspi_read_register moved into the private
driver structure. But they weren't protected against mutual access
(e.g. between driver kthread and ethtool). So dumping the QCA7000
registers via ethtool during network traffic could make spi_sync
hang forever, because the completion in spi_message is overwritten.
So revert the optimization completely.
Fixes: 291ab06ecf ("net: qualcomm: new Ethernet over SPI driver for QCA700")
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
120 lines
2.8 KiB
C
120 lines
2.8 KiB
C
/*
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*
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* Copyright (c) 2011, 2012, Qualcomm Atheros Communications Inc.
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* Copyright (c) 2014, I2SE GmbH
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*
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* Permission to use, copy, modify, and/or distribute this software
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* for any purpose with or without fee is hereby granted, provided
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* that the above copyright notice and this permission notice appear
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* in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
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* WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL
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* THE AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR
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* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
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* LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT,
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* NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
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* CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*
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*/
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/* This module implements the Qualcomm Atheros SPI protocol for
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* kernel-based SPI device.
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*/
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#include <linux/kernel.h>
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#include <linux/netdevice.h>
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#include <linux/spi/spi.h>
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#include "qca_7k.h"
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void
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qcaspi_spi_error(struct qcaspi *qca)
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{
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if (qca->sync != QCASPI_SYNC_READY)
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return;
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netdev_err(qca->net_dev, "spi error\n");
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qca->sync = QCASPI_SYNC_UNKNOWN;
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qca->stats.spi_err++;
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}
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int
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qcaspi_read_register(struct qcaspi *qca, u16 reg, u16 *result)
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{
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__be16 rx_data;
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__be16 tx_data;
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struct spi_transfer transfer[2];
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struct spi_message msg;
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int ret;
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memset(transfer, 0, sizeof(transfer));
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spi_message_init(&msg);
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tx_data = cpu_to_be16(QCA7K_SPI_READ | QCA7K_SPI_INTERNAL | reg);
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*result = 0;
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transfer[0].tx_buf = &tx_data;
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transfer[0].len = QCASPI_CMD_LEN;
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transfer[1].rx_buf = &rx_data;
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transfer[1].len = QCASPI_CMD_LEN;
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spi_message_add_tail(&transfer[0], &msg);
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if (qca->legacy_mode) {
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spi_sync(qca->spi_dev, &msg);
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spi_message_init(&msg);
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}
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spi_message_add_tail(&transfer[1], &msg);
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ret = spi_sync(qca->spi_dev, &msg);
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if (!ret)
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ret = msg.status;
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if (ret)
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qcaspi_spi_error(qca);
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else
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*result = be16_to_cpu(rx_data);
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return ret;
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}
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int
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qcaspi_write_register(struct qcaspi *qca, u16 reg, u16 value)
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{
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__be16 tx_data[2];
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struct spi_transfer transfer[2];
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struct spi_message msg;
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int ret;
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memset(&transfer, 0, sizeof(transfer));
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spi_message_init(&msg);
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tx_data[0] = cpu_to_be16(QCA7K_SPI_WRITE | QCA7K_SPI_INTERNAL | reg);
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tx_data[1] = cpu_to_be16(value);
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transfer[0].tx_buf = &tx_data[0];
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transfer[0].len = QCASPI_CMD_LEN;
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transfer[1].tx_buf = &tx_data[1];
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transfer[1].len = QCASPI_CMD_LEN;
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spi_message_add_tail(&transfer[0], &msg);
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if (qca->legacy_mode) {
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spi_sync(qca->spi_dev, &msg);
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spi_message_init(&msg);
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}
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spi_message_add_tail(&transfer[1], &msg);
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ret = spi_sync(qca->spi_dev, &msg);
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if (!ret)
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ret = msg.status;
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if (ret)
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qcaspi_spi_error(qca);
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return ret;
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}
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