mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-25 02:50:53 +07:00
77fa22450d
Improved machine check handling. Kernel is now able to receive machine checks while in kernel mode (system call, interrupt and program check handling). Also register validation is now performed. Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
105 lines
4.3 KiB
C
105 lines
4.3 KiB
C
/*
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* drivers/s390/s390mach.h
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* S/390 data definitions for machine check processing
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*
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* S390 version
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* Copyright (C) 2000 IBM Deutschland Entwicklung GmbH, IBM Corporation
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* Author(s): Ingo Adlung (adlung@de.ibm.com)
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*/
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#ifndef __s390mach_h
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#define __s390mach_h
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#include <asm/types.h>
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struct mci {
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__u32 sd : 1; /* 00 system damage */
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__u32 pd : 1; /* 01 instruction-processing damage */
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__u32 sr : 1; /* 02 system recovery */
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__u32 to_be_defined_1 : 1; /* 03 */
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__u32 cd : 1; /* 04 timing-facility damage */
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__u32 ed : 1; /* 05 external damage */
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__u32 to_be_defined_2 : 1; /* 06 */
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__u32 dg : 1; /* 07 degradation */
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__u32 w : 1; /* 08 warning pending */
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__u32 cp : 1; /* 09 channel-report pending */
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__u32 sp : 1; /* 10 service-processor damage */
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__u32 ck : 1; /* 11 channel-subsystem damage */
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__u32 to_be_defined_3 : 2; /* 12-13 */
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__u32 b : 1; /* 14 backed up */
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__u32 to_be_defined_4 : 1; /* 15 */
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__u32 se : 1; /* 16 storage error uncorrected */
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__u32 sc : 1; /* 17 storage error corrected */
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__u32 ke : 1; /* 18 storage-key error uncorrected */
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__u32 ds : 1; /* 19 storage degradation */
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__u32 wp : 1; /* 20 psw mwp validity */
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__u32 ms : 1; /* 21 psw mask and key validity */
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__u32 pm : 1; /* 22 psw program mask and cc validity */
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__u32 ia : 1; /* 23 psw instruction address validity */
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__u32 fa : 1; /* 24 failing storage address validity */
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__u32 to_be_defined_5 : 1; /* 25 */
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__u32 ec : 1; /* 26 external damage code validity */
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__u32 fp : 1; /* 27 floating point register validity */
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__u32 gr : 1; /* 28 general register validity */
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__u32 cr : 1; /* 29 control register validity */
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__u32 to_be_defined_6 : 1; /* 30 */
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__u32 st : 1; /* 31 storage logical validity */
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__u32 ie : 1; /* 32 indirect storage error */
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__u32 ar : 1; /* 33 access register validity */
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__u32 da : 1; /* 34 delayed access exception */
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__u32 to_be_defined_7 : 7; /* 35-41 */
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__u32 pr : 1; /* 42 tod programmable register validity */
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__u32 fc : 1; /* 43 fp control register validity */
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__u32 ap : 1; /* 44 ancillary report */
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__u32 to_be_defined_8 : 1; /* 45 */
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__u32 ct : 1; /* 46 cpu timer validity */
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__u32 cc : 1; /* 47 clock comparator validity */
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__u32 to_be_defined_9 : 16; /* 47-63 */
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};
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/*
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* Channel Report Word
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*/
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struct crw {
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__u32 res1 : 1; /* reserved zero */
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__u32 slct : 1; /* solicited */
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__u32 oflw : 1; /* overflow */
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__u32 chn : 1; /* chained */
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__u32 rsc : 4; /* reporting source code */
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__u32 anc : 1; /* ancillary report */
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__u32 res2 : 1; /* reserved zero */
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__u32 erc : 6; /* error-recovery code */
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__u32 rsid : 16; /* reporting-source ID */
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} __attribute__ ((packed));
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#define CRW_RSC_MONITOR 0x2 /* monitoring facility */
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#define CRW_RSC_SCH 0x3 /* subchannel */
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#define CRW_RSC_CPATH 0x4 /* channel path */
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#define CRW_RSC_CONFIG 0x9 /* configuration-alert facility */
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#define CRW_RSC_CSS 0xB /* channel subsystem */
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#define CRW_ERC_EVENT 0x00 /* event information pending */
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#define CRW_ERC_AVAIL 0x01 /* available */
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#define CRW_ERC_INIT 0x02 /* initialized */
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#define CRW_ERC_TERROR 0x03 /* temporary error */
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#define CRW_ERC_IPARM 0x04 /* installed parm initialized */
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#define CRW_ERC_TERM 0x05 /* terminal */
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#define CRW_ERC_PERRN 0x06 /* perm. error, fac. not init */
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#define CRW_ERC_PERRI 0x07 /* perm. error, facility init */
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#define CRW_ERC_PMOD 0x08 /* installed parameters modified */
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extern __inline__ int stcrw(struct crw *pcrw )
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{
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int ccode;
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__asm__ __volatile__(
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"STCRW 0(%1)\n\t"
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"IPM %0\n\t"
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"SRL %0,28\n\t"
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: "=d" (ccode) : "a" (pcrw)
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: "cc", "1" );
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return ccode;
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}
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#endif /* __s390mach */
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