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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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9920322ccd
After successful loading of firmware, a CARD READY indication is received by host. Common device configuration parameters are sent to the device after this. It includes information like device operating mode (Wi-Fi alone or BT coex), power save related parameters, GPIO information etc. As device supports BT coex, this frame is send in COEX queue initially. Based on the operating mode, CARD READY indication is received from each protocol module in firmware i.e. WLAN, BT. Signed-off-by: Prameela Rani Garnepudi <prameela.j04cs@gmail.com> Signed-off-by: Amitkumar Karwar <amit.karwar@redpinesignals.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
85 lines
2.3 KiB
C
85 lines
2.3 KiB
C
/**
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* Copyright (c) 2017 Redpine Signals Inc.
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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#ifndef __RSI_HAL_H__
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#define __RSI_HAL_H__
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#define FLASH_WRITE_CHUNK_SIZE (4 * 1024)
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#define FLASH_SECTOR_SIZE (4 * 1024)
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#define FLASH_SIZE_ADDR 0x04000016
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#define PING_BUFFER_ADDRESS 0x19000
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#define PONG_BUFFER_ADDRESS 0x1a000
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#define SWBL_REGIN 0x41050034
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#define SWBL_REGOUT 0x4105003c
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#define PING_WRITE 0x1
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#define PONG_WRITE 0x2
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#define BL_CMD_TIMEOUT 2000
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#define BL_BURN_TIMEOUT (50 * 1000)
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#define REGIN_VALID 0xA
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#define REGIN_INPUT 0xA0
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#define REGOUT_VALID 0xAB
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#define REGOUT_INVALID (~0xAB)
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#define CMD_PASS 0xAA
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#define CMD_FAIL 0xCC
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#define LOAD_HOSTED_FW 'A'
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#define BURN_HOSTED_FW 'B'
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#define PING_VALID 'I'
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#define PONG_VALID 'O'
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#define PING_AVAIL 'I'
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#define PONG_AVAIL 'O'
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#define EOF_REACHED 'E'
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#define CHECK_CRC 'K'
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#define POLLING_MODE 'P'
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#define CONFIG_AUTO_READ_MODE 'R'
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#define JUMP_TO_ZERO_PC 'J'
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#define FW_LOADING_SUCCESSFUL 'S'
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#define LOADING_INITIATED '1'
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/* Boot loader commands */
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#define SEND_RPS_FILE '2'
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#define FW_IMAGE_MIN_ADDRESS (68 * 1024)
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#define MAX_FLASH_FILE_SIZE (400 * 1024) //400K
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#define FLASH_START_ADDRESS 16
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#define COMMON_HAL_CARD_READY_IND 0x0
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#define COMMAN_HAL_WAIT_FOR_CARD_READY 1
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#define RSI_DEV_OPMODE_WIFI_ALONE 1
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#define RSI_DEV_COEX_MODE_WIFI_ALONE 1
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struct bl_header {
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__le32 flags;
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__le32 image_no;
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__le32 check_sum;
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__le32 flash_start_address;
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__le32 flash_len;
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} __packed;
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struct ta_metadata {
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char *name;
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unsigned int address;
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};
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int rsi_hal_device_init(struct rsi_hw *adapter);
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#endif
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