mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-05 06:56:52 +07:00
fa91515cbf
Lots of cleanup and refactoring and some SMP additions for Renesas
platforms. Due to some inter-dependencies with other arm-soc
branches, this Renesas stuff was separated out for sending after the
other branches were merged.
Highlights:
- remove unused board support and cleanup of unused headers
- refactoring of init and device registration
- simplify IRQ initialization
Conflicts: Too many. Most of these are because Simon chose to send
some board updates through the V4L tree that ends up colliding with
the main platform changes. We'll work with him on sorting out his
workflow:
- arch/arm/boot/dts/r8a7740.dtsi:
- Add/add conflict in a devicetree file (keep both)
- arch/arm/mach-shmobile/Makefile:
- Splitting out of clock files collides with intc move to DT.
Keep HEAD version but remove intc-* files for R8A7740 and R8A7779.
- arch/arm/mach-shmobile/board-bockw.c:
- Keep HEAD but remove i2c, hspi and mmc device init calls
- arch/arm/mach-shmobile/board-marzen.c
- Remove mach/hardware.h include and r8a7779_add_usb_phy_device() call,
everything else stays.
- arch/arm/mach-shmobile/include/mach/r8a7778.h:
- From HEAD, Keep camera-rcar.h include and r8a7778_add_vin_device()
- From branch, keep everything
- arch/arm/mach-shmobile/include/mach/r8a7779.h:
- From HEAD, Keep only camera-rcar.h include and r8a7779_add_vin_device()
- arch/arm/mach-shmobile/setup-r8a7778.c
- Keep HEAD, but drop the MMC section (struct resource + add_mmc_device())
- take the new function name from our side (r8a7778_add_dt_devices())
- arch/arm/mach-shmobile/setup-r8a7779.c
- Keep HEAD, but drop r8a7779_add_usb_phy_device()
I've also pushed a test-merge2 branch where you can see how I resolved
them.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJSLkaWAAoJEFk3GJrT+8Zl5l8P/3oJ83VJHcjD2fMpAb8Dz5b6
pdRLxFLJrLxN+WTC1LylPom3EsSAJuuaG3Z8Cr9Xa6yoWuUYLy/A6MwsyLXBOGLC
3tVWa96xt1cHhd3p/NAOQwvRz/CFdMLM7MStd0mgSihj/pq3jtc2V697+dRtmJih
J0mIc8+jnig+uwVl1DMCmBqdEmasccaDZeX30PcjaPL9ZDyZBeSXI8brdDx8A21e
5RiAsqn9HCxrLZjedL9TWA23BJ7NccsI3aVGpQVtCa9N/MHKp8gZft3v8FrWzFjk
cOeaZY55Xq8hbbbmkF1LoezLrlQDF5aJcj6tl85lyuSJfR5d5BXmLswI7bglw8Qy
ZU7/aF28pbhUT3oozNuRx5yl8oqpxmUoCwfP5hfnFf590OJ3noIELbOoIZQkJQUy
LsCf3GMUQaWzrvs0IenM1lMJmw5zfDXbrUWUti95OAd5bbTdBE30z7EouejoKRVh
1/Wg4keBdtem4CpU+C4fUVtLL4XJhe/uadbjKteA7DRpTRMvrLYNutQgyOAuQjRM
RiLvDPnsIZEGV+YMsj+IemN0hanae4kR3v8At+HwvVK1hROWEQWyL6cGxXH9n9jB
VToxoYoyiAOk01X2BnPVMVTXEl5XMAVgZ1IgZNhnhaIUxi3HKrUfNG4oXE5Jx8Lw
XruUAUKHknTUJ2Q/3y4D
=Fagt
-----END PGP SIGNATURE-----
Merge tag 'renesas-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM Renesas SoC cleanup, refactoring and more SMP support from Kevin Hilman:
"Lots of cleanup and refactoring and some SMP additions for Renesas
platforms. Due to some inter-dependencies with other arm-soc
branches, this Renesas stuff was separated out for sending after the
other branches were merged.
Highlights:
- remove unused board support and cleanup of unused headers
- refactoring of init and device registration
- simplify IRQ initialization"
* tag 'renesas-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (68 commits)
ARM: shmobile: Per-CPU SMP boot / sleep code for SCU SoCs
ARM: shmobile: Introduce per-CPU SMP boot / sleep code
ARM: shmobile: Use shared SCU CPU Hotplug code on r8a7779
ARM: shmobile: Use shared SCU CPU Hotplug code on sh73a0
ARM: shmobile: Add shared SCU CPU Hotplug code
ARM: shmobile: Use shared SCU SMP boot code on emev2
ARM: shmobile: Use shared SCU SMP boot code on r8a7779
ARM: shmobile: Use shared SCU SMP boot code on sh73a0
ARM: shmobile: Introduce shared SCU SMP boot code
ARM: shmobile: sh73a0: Remove global GPIO_NR definition
ARM: shmobile: kzm9d: remove nfsroot settings from bootargs
ARM: shmobile: armadillo800eva: remove nfsroot settings from bootargs
ARM: shmobile: r8a7779: move r8a7779_init_irq_xxx() to setup
ARM: shmobile: r8a7740: move r8a7740_init_irq_of() to setup
ARM: shmobile: bockw: add missing __initdata
ARM: shmobile: r8a7790: add missing __initdata
ARM: shmobile: r8a7779: add missing __initdata
ARM: shmobile: Remove unused shmobile_init_time()
ARM: shmobile: Use clocksource_of_init() on r8a7790
ARM: shmobile: Use default ->init_time() on KZM9G DT ref
...
240 lines
4.8 KiB
Plaintext
240 lines
4.8 KiB
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/*
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* Device Tree Source for the SH73A0 SoC
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*
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* Copyright (C) 2012 Renesas Solutions Corp.
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*
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* This file is licensed under the terms of the GNU General Public License
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* version 2. This program is licensed "as is" without any warranty of any
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* kind, whether express or implied.
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*/
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/include/ "skeleton.dtsi"
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/ {
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compatible = "renesas,sh73a0";
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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device_type = "cpu";
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compatible = "arm,cortex-a9";
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reg = <0>;
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};
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cpu@1 {
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device_type = "cpu";
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compatible = "arm,cortex-a9";
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reg = <1>;
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};
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};
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gic: interrupt-controller@f0001000 {
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compatible = "arm,cortex-a9-gic";
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#interrupt-cells = <3>;
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#address-cells = <1>;
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interrupt-controller;
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reg = <0xf0001000 0x1000>,
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<0xf0000100 0x100>;
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};
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pmu {
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compatible = "arm,cortex-a9-pmu";
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interrupts = <0 55 4>,
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<0 56 4>;
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};
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irqpin0: irqpin@e6900000 {
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compatible = "renesas,intc-irqpin";
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#interrupt-cells = <2>;
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interrupt-controller;
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reg = <0xe6900000 4>,
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<0xe6900010 4>,
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<0xe6900020 1>,
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<0xe6900040 1>,
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<0xe6900060 1>;
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interrupt-parent = <&gic>;
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interrupts = <0 1 0x4
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0 2 0x4
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0 3 0x4
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0 4 0x4
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0 5 0x4
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0 6 0x4
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0 7 0x4
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0 8 0x4>;
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};
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irqpin1: irqpin@e6900004 {
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compatible = "renesas,intc-irqpin";
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#interrupt-cells = <2>;
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interrupt-controller;
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reg = <0xe6900004 4>,
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<0xe6900014 4>,
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<0xe6900024 1>,
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<0xe6900044 1>,
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<0xe6900064 1>;
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interrupt-parent = <&gic>;
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interrupts = <0 9 0x4
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0 10 0x4
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0 11 0x4
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0 12 0x4
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0 13 0x4
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0 14 0x4
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0 15 0x4
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0 16 0x4>;
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control-parent;
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};
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irqpin2: irqpin@e6900008 {
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compatible = "renesas,intc-irqpin";
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#interrupt-cells = <2>;
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interrupt-controller;
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reg = <0xe6900008 4>,
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<0xe6900018 4>,
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<0xe6900028 1>,
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<0xe6900048 1>,
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<0xe6900068 1>;
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interrupt-parent = <&gic>;
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interrupts = <0 17 0x4
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0 18 0x4
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0 19 0x4
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0 20 0x4
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0 21 0x4
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0 22 0x4
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0 23 0x4
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0 24 0x4>;
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};
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irqpin3: irqpin@e690000c {
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compatible = "renesas,intc-irqpin";
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#interrupt-cells = <2>;
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interrupt-controller;
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reg = <0xe690000c 4>,
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<0xe690001c 4>,
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<0xe690002c 1>,
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<0xe690004c 1>,
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<0xe690006c 1>;
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interrupt-parent = <&gic>;
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interrupts = <0 25 0x4
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0 26 0x4
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0 27 0x4
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0 28 0x4
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0 29 0x4
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0 30 0x4
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0 31 0x4
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0 32 0x4>;
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};
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i2c0: i2c@e6820000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "renesas,rmobile-iic";
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reg = <0xe6820000 0x425>;
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interrupt-parent = <&gic>;
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interrupts = <0 167 0x4
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0 168 0x4
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0 169 0x4
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0 170 0x4>;
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};
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i2c1: i2c@e6822000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "renesas,rmobile-iic";
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reg = <0xe6822000 0x425>;
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interrupt-parent = <&gic>;
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interrupts = <0 51 0x4
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0 52 0x4
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0 53 0x4
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0 54 0x4>;
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};
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i2c2: i2c@e6824000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "renesas,rmobile-iic";
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reg = <0xe6824000 0x425>;
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interrupt-parent = <&gic>;
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interrupts = <0 171 0x4
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0 172 0x4
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0 173 0x4
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0 174 0x4>;
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};
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i2c3: i2c@e6826000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "renesas,rmobile-iic";
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reg = <0xe6826000 0x425>;
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interrupt-parent = <&gic>;
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interrupts = <0 183 0x4
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0 184 0x4
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0 185 0x4
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0 186 0x4>;
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};
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i2c4: i2c@e6828000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "renesas,rmobile-iic";
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reg = <0xe6828000 0x425>;
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interrupt-parent = <&gic>;
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interrupts = <0 187 0x4
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0 188 0x4
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0 189 0x4
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0 190 0x4>;
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};
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mmcif: mmcif@e6bd0000 {
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compatible = "renesas,sh-mmcif";
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reg = <0xe6bd0000 0x100>;
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interrupt-parent = <&gic>;
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interrupts = <0 140 0x4
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0 141 0x4>;
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reg-io-width = <4>;
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status = "disabled";
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};
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sdhi0: sdhi@ee100000 {
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compatible = "renesas,r8a7740-sdhi";
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reg = <0xee100000 0x100>;
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interrupt-parent = <&gic>;
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interrupts = <0 83 4
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0 84 4
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0 85 4>;
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cap-sd-highspeed;
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status = "disabled";
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};
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/* SDHI1 and SDHI2 have no CD pins, no need for CD IRQ */
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sdhi1: sdhi@ee120000 {
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compatible = "renesas,r8a7740-sdhi";
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reg = <0xee120000 0x100>;
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interrupt-parent = <&gic>;
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interrupts = <0 88 4
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0 89 4>;
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toshiba,mmc-wrprotect-disable;
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cap-sd-highspeed;
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status = "disabled";
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};
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sdhi2: sdhi@ee140000 {
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compatible = "renesas,r8a7740-sdhi";
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reg = <0xee140000 0x100>;
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interrupt-parent = <&gic>;
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interrupts = <0 104 4
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0 105 4>;
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toshiba,mmc-wrprotect-disable;
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cap-sd-highspeed;
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status = "disabled";
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};
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pfc: pfc@e6050000 {
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compatible = "renesas,pfc-sh73a0";
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reg = <0xe6050000 0x8000>,
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<0xe605801c 0x1c>;
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gpio-controller;
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#gpio-cells = <2>;
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};
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};
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