mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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d6cae935ec
To avoid saving two copies for one H/W event, add a new file under debugfs to control how to save event log. Once this file is opened, the perf/trace will be used, in the meanwhile, kernel will stop printing event log to the console. On the other hand, if this file is closed, kernel will print event log to the console again. Signed-off-by: Chen, Gong <gong.chen@linux.intel.com> Acked-by: Borislav Petkov <bp@suse.de> Signed-off-by: Tony Luck <tony.luck@intel.com>
331 lines
8.7 KiB
C
331 lines
8.7 KiB
C
/*
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* Extended Error Log driver
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*
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* Copyright (C) 2013 Intel Corp.
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* Author: Chen, Gong <gong.chen@intel.com>
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*
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* This file is licensed under GPLv2.
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*/
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#include <linux/module.h>
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#include <linux/acpi.h>
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#include <linux/cper.h>
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#include <linux/ratelimit.h>
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#include <linux/edac.h>
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#include <linux/ras.h>
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#include <asm/cpu.h>
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#include <asm/mce.h>
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#include "apei/apei-internal.h"
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#include <ras/ras_event.h>
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#define EXT_ELOG_ENTRY_MASK GENMASK_ULL(51, 0) /* elog entry address mask */
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#define EXTLOG_DSM_REV 0x0
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#define EXTLOG_FN_ADDR 0x1
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#define FLAG_OS_OPTIN BIT(0)
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#define ELOG_ENTRY_VALID (1ULL<<63)
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#define ELOG_ENTRY_LEN 0x1000
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#define EMCA_BUG \
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"Can not request iomem region <0x%016llx-0x%016llx> - eMCA disabled\n"
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struct extlog_l1_head {
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u32 ver; /* Header Version */
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u32 hdr_len; /* Header Length */
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u64 total_len; /* entire L1 Directory length including this header */
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u64 elog_base; /* MCA Error Log Directory base address */
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u64 elog_len; /* MCA Error Log Directory length */
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u32 flags; /* bit 0 - OS/VMM Opt-in */
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u8 rev0[12];
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u32 entries; /* Valid L1 Directory entries per logical processor */
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u8 rev1[12];
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};
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static int old_edac_report_status;
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static u8 extlog_dsm_uuid[] __initdata = "663E35AF-CC10-41A4-88EA-5470AF055295";
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/* L1 table related physical address */
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static u64 elog_base;
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static size_t elog_size;
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static u64 l1_dirbase;
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static size_t l1_size;
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/* L1 table related virtual address */
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static void __iomem *extlog_l1_addr;
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static void __iomem *elog_addr;
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static void *elog_buf;
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static u64 *l1_entry_base;
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static u32 l1_percpu_entry;
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#define ELOG_IDX(cpu, bank) \
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(cpu_physical_id(cpu) * l1_percpu_entry + (bank))
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#define ELOG_ENTRY_DATA(idx) \
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(*(l1_entry_base + (idx)))
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#define ELOG_ENTRY_ADDR(phyaddr) \
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(phyaddr - elog_base + (u8 *)elog_addr)
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static struct acpi_generic_status *extlog_elog_entry_check(int cpu, int bank)
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{
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int idx;
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u64 data;
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struct acpi_generic_status *estatus;
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WARN_ON(cpu < 0);
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idx = ELOG_IDX(cpu, bank);
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data = ELOG_ENTRY_DATA(idx);
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if ((data & ELOG_ENTRY_VALID) == 0)
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return NULL;
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data &= EXT_ELOG_ENTRY_MASK;
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estatus = (struct acpi_generic_status *)ELOG_ENTRY_ADDR(data);
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/* if no valid data in elog entry, just return */
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if (estatus->block_status == 0)
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return NULL;
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return estatus;
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}
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static void __print_extlog_rcd(const char *pfx,
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struct acpi_generic_status *estatus, int cpu)
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{
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static atomic_t seqno;
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unsigned int curr_seqno;
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char pfx_seq[64];
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if (!pfx) {
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if (estatus->error_severity <= CPER_SEV_CORRECTED)
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pfx = KERN_INFO;
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else
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pfx = KERN_ERR;
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}
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curr_seqno = atomic_inc_return(&seqno);
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snprintf(pfx_seq, sizeof(pfx_seq), "%s{%u}", pfx, curr_seqno);
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printk("%s""Hardware error detected on CPU%d\n", pfx_seq, cpu);
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cper_estatus_print(pfx_seq, estatus);
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}
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static int print_extlog_rcd(const char *pfx,
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struct acpi_generic_status *estatus, int cpu)
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{
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/* Not more than 2 messages every 5 seconds */
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static DEFINE_RATELIMIT_STATE(ratelimit_corrected, 5*HZ, 2);
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static DEFINE_RATELIMIT_STATE(ratelimit_uncorrected, 5*HZ, 2);
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struct ratelimit_state *ratelimit;
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if (estatus->error_severity == CPER_SEV_CORRECTED ||
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(estatus->error_severity == CPER_SEV_INFORMATIONAL))
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ratelimit = &ratelimit_corrected;
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else
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ratelimit = &ratelimit_uncorrected;
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if (__ratelimit(ratelimit)) {
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__print_extlog_rcd(pfx, estatus, cpu);
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return 0;
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}
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return 1;
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}
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static int extlog_print(struct notifier_block *nb, unsigned long val,
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void *data)
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{
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struct mce *mce = (struct mce *)data;
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int bank = mce->bank;
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int cpu = mce->extcpu;
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struct acpi_generic_status *estatus, *tmp;
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struct acpi_generic_data *gdata;
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const uuid_le *fru_id = &NULL_UUID_LE;
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char *fru_text = "";
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uuid_le *sec_type;
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static u32 err_seq;
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estatus = extlog_elog_entry_check(cpu, bank);
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if (estatus == NULL)
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return NOTIFY_DONE;
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memcpy(elog_buf, (void *)estatus, ELOG_ENTRY_LEN);
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/* clear record status to enable BIOS to update it again */
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estatus->block_status = 0;
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tmp = (struct acpi_generic_status *)elog_buf;
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if (!ras_userspace_consumers()) {
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print_extlog_rcd(NULL, tmp, cpu);
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goto out;
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}
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/* log event via trace */
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err_seq++;
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gdata = (struct acpi_generic_data *)(tmp + 1);
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if (gdata->validation_bits & CPER_SEC_VALID_FRU_ID)
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fru_id = (uuid_le *)gdata->fru_id;
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if (gdata->validation_bits & CPER_SEC_VALID_FRU_TEXT)
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fru_text = gdata->fru_text;
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sec_type = (uuid_le *)gdata->section_type;
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if (!uuid_le_cmp(*sec_type, CPER_SEC_PLATFORM_MEM)) {
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struct cper_sec_mem_err *mem = (void *)(gdata + 1);
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if (gdata->error_data_length >= sizeof(*mem))
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trace_extlog_mem_event(mem, err_seq, fru_id, fru_text,
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(u8)gdata->error_severity);
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}
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out:
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return NOTIFY_STOP;
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}
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static bool __init extlog_get_l1addr(void)
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{
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u8 uuid[16];
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acpi_handle handle;
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union acpi_object *obj;
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acpi_str_to_uuid(extlog_dsm_uuid, uuid);
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if (ACPI_FAILURE(acpi_get_handle(NULL, "\\_SB", &handle)))
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return false;
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if (!acpi_check_dsm(handle, uuid, EXTLOG_DSM_REV, 1 << EXTLOG_FN_ADDR))
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return false;
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obj = acpi_evaluate_dsm_typed(handle, uuid, EXTLOG_DSM_REV,
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EXTLOG_FN_ADDR, NULL, ACPI_TYPE_INTEGER);
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if (!obj) {
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return false;
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} else {
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l1_dirbase = obj->integer.value;
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ACPI_FREE(obj);
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}
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/* Spec says L1 directory must be 4K aligned, bail out if it isn't */
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if (l1_dirbase & ((1 << 12) - 1)) {
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pr_warn(FW_BUG "L1 Directory is invalid at physical %llx\n",
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l1_dirbase);
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return false;
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}
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return true;
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}
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static struct notifier_block extlog_mce_dec = {
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.notifier_call = extlog_print,
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};
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static int __init extlog_init(void)
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{
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struct extlog_l1_head *l1_head;
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void __iomem *extlog_l1_hdr;
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size_t l1_hdr_size;
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struct resource *r;
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u64 cap;
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int rc;
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if (get_edac_report_status() == EDAC_REPORTING_FORCE) {
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pr_warn("Not loading eMCA, error reporting force-enabled through EDAC.\n");
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return -EPERM;
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}
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rc = -ENODEV;
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rdmsrl(MSR_IA32_MCG_CAP, cap);
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if (!(cap & MCG_ELOG_P))
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return rc;
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if (!extlog_get_l1addr())
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return rc;
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rc = -EINVAL;
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/* get L1 header to fetch necessary information */
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l1_hdr_size = sizeof(struct extlog_l1_head);
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r = request_mem_region(l1_dirbase, l1_hdr_size, "L1 DIR HDR");
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if (!r) {
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pr_warn(FW_BUG EMCA_BUG,
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(unsigned long long)l1_dirbase,
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(unsigned long long)l1_dirbase + l1_hdr_size);
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goto err;
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}
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extlog_l1_hdr = acpi_os_map_iomem(l1_dirbase, l1_hdr_size);
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l1_head = (struct extlog_l1_head *)extlog_l1_hdr;
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l1_size = l1_head->total_len;
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l1_percpu_entry = l1_head->entries;
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elog_base = l1_head->elog_base;
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elog_size = l1_head->elog_len;
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acpi_os_unmap_iomem(extlog_l1_hdr, l1_hdr_size);
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release_mem_region(l1_dirbase, l1_hdr_size);
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/* remap L1 header again based on completed information */
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r = request_mem_region(l1_dirbase, l1_size, "L1 Table");
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if (!r) {
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pr_warn(FW_BUG EMCA_BUG,
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(unsigned long long)l1_dirbase,
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(unsigned long long)l1_dirbase + l1_size);
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goto err;
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}
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extlog_l1_addr = acpi_os_map_iomem(l1_dirbase, l1_size);
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l1_entry_base = (u64 *)((u8 *)extlog_l1_addr + l1_hdr_size);
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/* remap elog table */
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r = request_mem_region(elog_base, elog_size, "Elog Table");
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if (!r) {
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pr_warn(FW_BUG EMCA_BUG,
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(unsigned long long)elog_base,
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(unsigned long long)elog_base + elog_size);
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goto err_release_l1_dir;
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}
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elog_addr = acpi_os_map_iomem(elog_base, elog_size);
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rc = -ENOMEM;
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/* allocate buffer to save elog record */
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elog_buf = kmalloc(ELOG_ENTRY_LEN, GFP_KERNEL);
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if (elog_buf == NULL)
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goto err_release_elog;
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/*
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* eMCA event report method has higher priority than EDAC method,
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* unless EDAC event report method is mandatory.
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*/
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old_edac_report_status = get_edac_report_status();
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set_edac_report_status(EDAC_REPORTING_DISABLED);
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mce_register_decode_chain(&extlog_mce_dec);
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/* enable OS to be involved to take over management from BIOS */
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((struct extlog_l1_head *)extlog_l1_addr)->flags |= FLAG_OS_OPTIN;
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return 0;
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err_release_elog:
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if (elog_addr)
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acpi_os_unmap_iomem(elog_addr, elog_size);
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release_mem_region(elog_base, elog_size);
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err_release_l1_dir:
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if (extlog_l1_addr)
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acpi_os_unmap_iomem(extlog_l1_addr, l1_size);
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release_mem_region(l1_dirbase, l1_size);
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err:
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pr_warn(FW_BUG "Extended error log disabled because of problems parsing f/w tables\n");
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return rc;
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}
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static void __exit extlog_exit(void)
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{
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set_edac_report_status(old_edac_report_status);
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mce_unregister_decode_chain(&extlog_mce_dec);
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((struct extlog_l1_head *)extlog_l1_addr)->flags &= ~FLAG_OS_OPTIN;
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if (extlog_l1_addr)
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acpi_os_unmap_iomem(extlog_l1_addr, l1_size);
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if (elog_addr)
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acpi_os_unmap_iomem(elog_addr, elog_size);
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release_mem_region(elog_base, elog_size);
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release_mem_region(l1_dirbase, l1_size);
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kfree(elog_buf);
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}
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module_init(extlog_init);
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module_exit(extlog_exit);
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MODULE_AUTHOR("Chen, Gong <gong.chen@intel.com>");
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MODULE_DESCRIPTION("Extended MCA Error Log Driver");
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MODULE_LICENSE("GPL");
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