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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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2874c5fd28
Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version extracted by the scancode license scanner the SPDX license identifier GPL-2.0-or-later has been chosen to replace the boilerplate/reference in 3029 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190527070032.746973796@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
102 lines
2.2 KiB
C
102 lines
2.2 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* clkgen-mux.c: ST GEN-MUX Clock driver
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*
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* Copyright (C) 2014 STMicroelectronics (R&D) Limited
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*
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* Authors: Stephen Gallimore <stephen.gallimore@st.com>
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* Pankaj Dev <pankaj.dev@st.com>
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*/
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#include <linux/slab.h>
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#include <linux/io.h>
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#include <linux/of_address.h>
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#include <linux/clk.h>
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#include <linux/clk-provider.h>
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#include "clkgen.h"
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static const char ** __init clkgen_mux_get_parents(struct device_node *np,
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int *num_parents)
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{
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const char **parents;
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unsigned int nparents;
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nparents = of_clk_get_parent_count(np);
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if (WARN_ON(!nparents))
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return ERR_PTR(-EINVAL);
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parents = kcalloc(nparents, sizeof(const char *), GFP_KERNEL);
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if (!parents)
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return ERR_PTR(-ENOMEM);
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*num_parents = of_clk_parent_fill(np, parents, nparents);
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return parents;
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}
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struct clkgen_mux_data {
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u32 offset;
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u8 shift;
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u8 width;
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spinlock_t *lock;
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unsigned long clk_flags;
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u8 mux_flags;
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};
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static struct clkgen_mux_data stih407_a9_mux_data = {
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.offset = 0x1a4,
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.shift = 0,
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.width = 2,
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.lock = &clkgen_a9_lock,
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};
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static void __init st_of_clkgen_mux_setup(struct device_node *np,
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struct clkgen_mux_data *data)
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{
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struct clk *clk;
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void __iomem *reg;
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const char **parents;
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int num_parents = 0;
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reg = of_iomap(np, 0);
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if (!reg) {
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pr_err("%s: Failed to get base address\n", __func__);
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return;
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}
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parents = clkgen_mux_get_parents(np, &num_parents);
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if (IS_ERR(parents)) {
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pr_err("%s: Failed to get parents (%ld)\n",
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__func__, PTR_ERR(parents));
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goto err_parents;
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}
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clk = clk_register_mux(NULL, np->name, parents, num_parents,
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data->clk_flags | CLK_SET_RATE_PARENT,
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reg + data->offset,
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data->shift, data->width, data->mux_flags,
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data->lock);
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if (IS_ERR(clk))
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goto err;
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pr_debug("%s: parent %s rate %u\n",
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__clk_get_name(clk),
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__clk_get_name(clk_get_parent(clk)),
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(unsigned int)clk_get_rate(clk));
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kfree(parents);
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of_clk_add_provider(np, of_clk_src_simple_get, clk);
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return;
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err:
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kfree(parents);
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err_parents:
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iounmap(reg);
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}
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static void __init st_of_clkgen_a9_mux_setup(struct device_node *np)
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{
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st_of_clkgen_mux_setup(np, &stih407_a9_mux_data);
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}
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CLK_OF_DECLARE(clkgen_a9mux, "st,stih407-clkgen-a9-mux",
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st_of_clkgen_a9_mux_setup);
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