linux_dsm_epyc7002/drivers/gpu
Dave Gordon d65621c496 drm/i915: Don't read 'HEAD' MMIO register in LRC mode
The logical ring code was updating the software ring 'head' value
by reading the hardware 'HEAD' register. In LRC mode, this is not
valid as the hardware is not necessarily executing the same context
that is being processed by the software. Thus reading the h/w HEAD
could put an unrelated (undefined, effectively random) value into
the s/w 'head' -- A Bad Thing for the free space calculations.

Signed-off-by: Dave Gordon <david.s.gordon@intel.com>
Reviewed-by: Deepak S <deepak.s@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-12-03 09:35:11 +01:00
..
drm drm/i915: Don't read 'HEAD' MMIO register in LRC mode 2014-12-03 09:35:11 +01:00
host1x gpu: host1x: mipi: Set MIPI_CAL_BIAS_PAD_CFG1 register 2014-11-13 16:11:57 +01:00
ipu-v3 IPUv3 fixes for v3.18 2014-10-07 14:31:14 +10:00
vga Merge branch 'sched-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip 2014-10-13 16:23:15 +02:00
Makefile