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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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8318d78a44
This patch creates new cfg80211 wiphy API for channel and bitrate registration and converts mac80211 and drivers to the new API. The old mac80211 API is completely ripped out. All drivers (except ath5k) are updated to the new API, in many cases I expect that optimisations can be done. Along with the regulatory code I've also ripped out the IEEE80211_HW_DEFAULT_REG_DOMAIN_CONFIGURED flag, I believe it to be unnecessary if the hardware simply gives us whatever channels it wants to support and we then enable/disable them as required, which is pretty much required for travelling. Additionally, the patch adds proper "basic" rate handling for STA mode interface, AP mode interface will have to have new API added to allow userspace to set the basic rate set, currently it'll be empty... However, the basic rate handling will need to be moved to the BSS conf stuff. I do expect there to be bugs in this, especially wrt. transmit power handling where I'm basically clueless about how it should work. Signed-off-by: Johannes Berg <johannes@sipsolutions.net> Signed-off-by: John W. Linville <linville@tuxdriver.com>
146 lines
3.6 KiB
C
146 lines
3.6 KiB
C
/*
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* Definitions for RTL8187 hardware
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*
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* Copyright 2007 Michael Wu <flamingice@sourmilk.net>
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* Copyright 2007 Andrea Merello <andreamrl@tiscali.it>
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*
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* Based on the r8187 driver, which is:
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* Copyright 2005 Andrea Merello <andreamrl@tiscali.it>, et al.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef RTL8187_H
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#define RTL8187_H
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#include "rtl818x.h"
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#define RTL8187_EEPROM_TXPWR_BASE 0x05
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#define RTL8187_EEPROM_MAC_ADDR 0x07
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#define RTL8187_EEPROM_TXPWR_CHAN_1 0x16 /* 3 channels */
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#define RTL8187_EEPROM_TXPWR_CHAN_6 0x1B /* 2 channels */
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#define RTL8187_EEPROM_TXPWR_CHAN_4 0x3D /* 2 channels */
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#define RTL8187_REQT_READ 0xC0
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#define RTL8187_REQT_WRITE 0x40
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#define RTL8187_REQ_GET_REG 0x05
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#define RTL8187_REQ_SET_REG 0x05
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#define RTL8187_MAX_RX 0x9C4
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struct rtl8187_rx_info {
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struct urb *urb;
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struct ieee80211_hw *dev;
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};
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struct rtl8187_rx_hdr {
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__le32 flags;
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u8 noise;
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u8 signal;
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u8 agc;
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u8 reserved;
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__le64 mac_time;
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} __attribute__((packed));
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struct rtl8187_tx_info {
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struct ieee80211_tx_control *control;
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struct urb *urb;
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struct ieee80211_hw *dev;
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};
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struct rtl8187_tx_hdr {
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__le32 flags;
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#define RTL8187_TX_FLAG_NO_ENCRYPT (1 << 15)
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#define RTL8187_TX_FLAG_MORE_FRAG (1 << 17)
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#define RTL8187_TX_FLAG_CTS (1 << 18)
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#define RTL8187_TX_FLAG_RTS (1 << 23)
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__le16 rts_duration;
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__le16 len;
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__le32 retry;
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} __attribute__((packed));
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struct rtl8187_priv {
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/* common between rtl818x drivers */
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struct rtl818x_csr *map;
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const struct rtl818x_rf_ops *rf;
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struct ieee80211_vif *vif;
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int mode;
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/* rtl8187 specific */
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struct ieee80211_channel channels[14];
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struct ieee80211_rate rates[12];
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struct ieee80211_supported_band band;
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struct usb_device *udev;
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u32 rx_conf;
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u16 txpwr_base;
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u8 asic_rev;
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struct sk_buff_head rx_queue;
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};
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void rtl8187_write_phy(struct ieee80211_hw *dev, u8 addr, u32 data);
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static inline u8 rtl818x_ioread8(struct rtl8187_priv *priv, u8 *addr)
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{
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u8 val;
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usb_control_msg(priv->udev, usb_rcvctrlpipe(priv->udev, 0),
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RTL8187_REQ_GET_REG, RTL8187_REQT_READ,
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(unsigned long)addr, 0, &val, sizeof(val), HZ / 2);
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return val;
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}
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static inline u16 rtl818x_ioread16(struct rtl8187_priv *priv, __le16 *addr)
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{
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__le16 val;
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usb_control_msg(priv->udev, usb_rcvctrlpipe(priv->udev, 0),
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RTL8187_REQ_GET_REG, RTL8187_REQT_READ,
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(unsigned long)addr, 0, &val, sizeof(val), HZ / 2);
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return le16_to_cpu(val);
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}
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static inline u32 rtl818x_ioread32(struct rtl8187_priv *priv, __le32 *addr)
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{
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__le32 val;
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usb_control_msg(priv->udev, usb_rcvctrlpipe(priv->udev, 0),
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RTL8187_REQ_GET_REG, RTL8187_REQT_READ,
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(unsigned long)addr, 0, &val, sizeof(val), HZ / 2);
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return le32_to_cpu(val);
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}
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static inline void rtl818x_iowrite8(struct rtl8187_priv *priv,
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u8 *addr, u8 val)
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{
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usb_control_msg(priv->udev, usb_sndctrlpipe(priv->udev, 0),
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RTL8187_REQ_SET_REG, RTL8187_REQT_WRITE,
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(unsigned long)addr, 0, &val, sizeof(val), HZ / 2);
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}
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static inline void rtl818x_iowrite16(struct rtl8187_priv *priv,
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__le16 *addr, u16 val)
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{
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__le16 buf = cpu_to_le16(val);
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usb_control_msg(priv->udev, usb_sndctrlpipe(priv->udev, 0),
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RTL8187_REQ_SET_REG, RTL8187_REQT_WRITE,
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(unsigned long)addr, 0, &buf, sizeof(buf), HZ / 2);
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}
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static inline void rtl818x_iowrite32(struct rtl8187_priv *priv,
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__le32 *addr, u32 val)
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{
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__le32 buf = cpu_to_le32(val);
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usb_control_msg(priv->udev, usb_sndctrlpipe(priv->udev, 0),
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RTL8187_REQ_SET_REG, RTL8187_REQT_WRITE,
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(unsigned long)addr, 0, &buf, sizeof(buf), HZ / 2);
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}
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#endif /* RTL8187_H */
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