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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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c8b11de040
AT91 ADC hardware integrate touch screen support. So this patch add touch screen support for at91 adc iio driver. To enable touch screen support in adc, you need to add the dt parameters: 1. which type of touch are used? (4 or 5 wires), sample period time. 2. correct pressure detect threshold value. In the meantime, since touch screen will use a interal period trigger of adc, so it is conflict to other hardware triggers. Driver will disable the hardware trigger support if touch screen is enabled. This driver has been tested in AT91SAM9X5-EK and SAMA5D3x-EK. Signed-off-by: Josh Wu <josh.wu@atmel.com> Acked-by: Dmitry Torokhov <dmitry.torokhov@gmail.com> CC: devicetree@vger.kernel.org Signed-off-by: Jonathan Cameron <jic23@kernel.org>
108 lines
4.2 KiB
C
108 lines
4.2 KiB
C
/*
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* arch/arm/mach-at91/include/mach/at91_adc.h
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*
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* Copyright (C) SAN People
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*
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* Analog-to-Digital Converter (ADC) registers.
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* Based on AT91SAM9260 datasheet revision D.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#ifndef AT91_ADC_H
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#define AT91_ADC_H
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#define AT91_ADC_CR 0x00 /* Control Register */
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#define AT91_ADC_SWRST (1 << 0) /* Software Reset */
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#define AT91_ADC_START (1 << 1) /* Start Conversion */
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#define AT91_ADC_MR 0x04 /* Mode Register */
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#define AT91_ADC_TRGEN (1 << 0) /* Trigger Enable */
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#define AT91_ADC_TRGSEL (7 << 1) /* Trigger Selection */
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#define AT91_ADC_TRGSEL_TC0 (0 << 1)
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#define AT91_ADC_TRGSEL_TC1 (1 << 1)
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#define AT91_ADC_TRGSEL_TC2 (2 << 1)
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#define AT91_ADC_TRGSEL_EXTERNAL (6 << 1)
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#define AT91_ADC_LOWRES (1 << 4) /* Low Resolution */
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#define AT91_ADC_SLEEP (1 << 5) /* Sleep Mode */
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#define AT91_ADC_PRESCAL_9260 (0x3f << 8) /* Prescalar Rate Selection */
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#define AT91_ADC_PRESCAL_9G45 (0xff << 8)
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#define AT91_ADC_PRESCAL_(x) ((x) << 8)
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#define AT91_ADC_STARTUP_9260 (0x1f << 16) /* Startup Up Time */
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#define AT91_ADC_STARTUP_9G45 (0x7f << 16)
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#define AT91_ADC_STARTUP_9X5 (0xf << 16)
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#define AT91_ADC_STARTUP_(x) ((x) << 16)
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#define AT91_ADC_SHTIM (0xf << 24) /* Sample & Hold Time */
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#define AT91_ADC_SHTIM_(x) ((x) << 24)
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#define AT91_ADC_CHER 0x10 /* Channel Enable Register */
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#define AT91_ADC_CHDR 0x14 /* Channel Disable Register */
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#define AT91_ADC_CHSR 0x18 /* Channel Status Register */
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#define AT91_ADC_CH(n) (1 << (n)) /* Channel Number */
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#define AT91_ADC_SR 0x1C /* Status Register */
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#define AT91_ADC_EOC(n) (1 << (n)) /* End of Conversion on Channel N */
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#define AT91_ADC_OVRE(n) (1 << ((n) + 8))/* Overrun Error on Channel N */
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#define AT91_ADC_DRDY (1 << 16) /* Data Ready */
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#define AT91_ADC_GOVRE (1 << 17) /* General Overrun Error */
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#define AT91_ADC_ENDRX (1 << 18) /* End of RX Buffer */
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#define AT91_ADC_RXFUFF (1 << 19) /* RX Buffer Full */
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#define AT91_ADC_SR_9X5 0x30 /* Status Register for 9x5 */
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#define AT91_ADC_SR_DRDY_9X5 (1 << 24) /* Data Ready */
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#define AT91_ADC_LCDR 0x20 /* Last Converted Data Register */
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#define AT91_ADC_LDATA (0x3ff)
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#define AT91_ADC_IER 0x24 /* Interrupt Enable Register */
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#define AT91_ADC_IDR 0x28 /* Interrupt Disable Register */
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#define AT91_ADC_IMR 0x2C /* Interrupt Mask Register */
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#define AT91_ADC_IER_PEN (1 << 29)
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#define AT91_ADC_IER_NOPEN (1 << 30)
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#define AT91_ADC_IER_XRDY (1 << 20)
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#define AT91_ADC_IER_YRDY (1 << 21)
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#define AT91_ADC_IER_PRDY (1 << 22)
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#define AT91_ADC_ISR_PENS (1 << 31)
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#define AT91_ADC_CHR(n) (0x30 + ((n) * 4)) /* Channel Data Register N */
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#define AT91_ADC_DATA (0x3ff)
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#define AT91_ADC_CDR0_9X5 (0x50) /* Channel Data Register 0 for 9X5 */
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#define AT91_ADC_ACR 0x94 /* Analog Control Register */
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#define AT91_ADC_ACR_PENDETSENS (0x3 << 0) /* pull-up resistor */
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#define AT91_ADC_TSMR 0xB0
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#define AT91_ADC_TSMR_TSMODE (3 << 0) /* Touch Screen Mode */
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#define AT91_ADC_TSMR_TSMODE_NONE (0 << 0)
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#define AT91_ADC_TSMR_TSMODE_4WIRE_NO_PRESS (1 << 0)
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#define AT91_ADC_TSMR_TSMODE_4WIRE_PRESS (2 << 0)
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#define AT91_ADC_TSMR_TSMODE_5WIRE (3 << 0)
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#define AT91_ADC_TSMR_TSAV (3 << 4) /* Averages samples */
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#define AT91_ADC_TSMR_TSAV_(x) ((x) << 4)
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#define AT91_ADC_TSMR_SCTIM (0x0f << 16) /* Switch closure time */
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#define AT91_ADC_TSMR_PENDBC (0x0f << 28) /* Pen Debounce time */
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#define AT91_ADC_TSMR_PENDBC_(x) ((x) << 28)
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#define AT91_ADC_TSMR_NOTSDMA (1 << 22) /* No Touchscreen DMA */
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#define AT91_ADC_TSMR_PENDET_DIS (0 << 24) /* Pen contact detection disable */
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#define AT91_ADC_TSMR_PENDET_ENA (1 << 24) /* Pen contact detection enable */
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#define AT91_ADC_TSXPOSR 0xB4
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#define AT91_ADC_TSYPOSR 0xB8
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#define AT91_ADC_TSPRESSR 0xBC
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#define AT91_ADC_TRGR_9260 AT91_ADC_MR
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#define AT91_ADC_TRGR_9G45 0x08
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#define AT91_ADC_TRGR_9X5 0xC0
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/* Trigger Register bit field */
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#define AT91_ADC_TRGR_TRGPER (0xffff << 16)
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#define AT91_ADC_TRGR_TRGPER_(x) ((x) << 16)
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#define AT91_ADC_TRGR_TRGMOD (0x7 << 0)
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#define AT91_ADC_TRGR_MOD_PERIOD_TRIG (5 << 0)
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#endif
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