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d57f727264
linux_dsm_epyc7002/arch/arc/include/asm
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Vineet Gupta d57f727264 ARC: add compiler barrier to LLSC based cmpxchg 
When auditing cmpxchg call sites, Chuck noted that gcc was optimizing
away some of the desired LDs.

|	do {
|		new = old = *ipi_data_ptr;
|		new |= 1U << msg;
|	} while (cmpxchg(ipi_data_ptr, old, new) != old);

was generating to below

| 8015cef8:	ld         r2,[r4,0]  <-- First LD
| 8015cefc:	bset       r1,r2,r1
|
| 8015cf00:	llock      r3,[r4]  <-- atomic op
| 8015cf04:	brne       r3,r2,8015cf10
| 8015cf08:	scond      r1,[r4]
| 8015cf0c:	bnz        8015cf00
|
| 8015cf10:	brne       r3,r2,8015cf00  <-- Branch doesn't go to orig LD

Although this was fixed by adding a ACCESS_ONCE in this call site, it
seems safer (for now at least) to add compiler barrier to LLSC based
cmpxchg

Reported-by: Chuck Jordan <cjordan@synopsys,com>
Cc: <stable@vger.kernel.org>
Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2015-06-25 05:59:23 +05:30
..
arcregs.h ARCv2: MMUv4: cache programming model changes 2015-06-22 14:06:55 +05:30
asm-offsets.h
atomic.h ARC: unbork !LLSC build 2015-05-10 12:06:57 +05:30
bitops.h ARCv2: Support for ARCv2 ISA and HS38x cores 2015-06-22 14:06:55 +05:30
bug.h ARC: BUG() dumps stack after @msg (@msg now same as in generic BUG)) 2014-10-13 14:46:18 +05:30
cache.h ARCv2: MMUv4: support aliasing icache config 2015-06-22 14:06:56 +05:30
cacheflush.h ARC: fold ___flush_dcache_page into __flush_dcache_page 2015-05-19 11:27:13 +05:30
checksum.h
clk.h
cmpxchg.h ARC: add compiler barrier to LLSC based cmpxchg 2015-06-25 05:59:23 +05:30
current.h ARC: remove extraneous __KERNEL__ guards 2014-10-13 14:46:20 +05:30
delay.h ARCv2: Adhere to Zero Delay loop restriction 2015-06-22 14:06:56 +05:30
disasm.h
dma-mapping.h ARC: remove the unused platform helpers from dma mapping API 2015-06-19 18:09:23 +05:30
dma.h
elf.h ARCv2: Support for ARCv2 ISA and HS38x cores 2015-06-22 14:06:55 +05:30
entry-arcv2.h ARCv2: Support for ARCv2 ISA and HS38x cores 2015-06-22 14:06:55 +05:30
entry-compact.h ARC: intc: split into ARCompact ISA specific, common bits 2015-06-19 18:09:40 +05:30
entry.h ARCv2: STAR 9000808988: signals involving Delay Slot 2015-06-22 14:06:55 +05:30
exec.h
futex.h
io.h ARC: Remove redundant PCI_IOBASE declaration 2014-11-10 12:14:53 +01:00
irq.h ARCv2: SMP: Support ARConnect (MCIP) for Inter-Core-Interrupts et al 2015-06-22 14:06:56 +05:30
irqflags-arcv2.h ARCv2: STAR 9000814690: Really Re-enable interrupts to avoid deadlocks 2015-06-22 14:06:55 +05:30
irqflags-compact.h ARCv2: Support for ARCv2 ISA and HS38x cores 2015-06-22 14:06:55 +05:30
irqflags.h ARCv2: Support for ARCv2 ISA and HS38x cores 2015-06-22 14:06:55 +05:30
Kbuild net, lib: kill arch_fast_hash library bits 2014-12-10 15:17:46 -05:00
kdebug.h
kgdb.h ARC: Update order of registers in KGDB to match GDB 7.5 2014-10-13 14:46:20 +05:30
kprobes.h
linkage.h ARC: switch to generic ENTRY/END assembler annotations 2014-03-26 14:31:28 +05:30
mach_desc.h
mcip.h ARCv2: SMP: clocksource: Enable Global Real Time counter 2015-06-22 14:06:57 +05:30
mmu_context.h ARC: [SMP] TLB flush 2013-11-06 10:41:45 +05:30
mmu.h ARCv2: MMUv4: TLB programming Model changes 2015-06-22 14:06:55 +05:30
module.h
mutex.h
page.h
perf_event.h ARC: perf: support cache hit/miss ratio 2015-04-20 18:27:34 +05:30
pgalloc.h arc: handle pgtable_page_ctor() fail 2013-11-15 09:32:16 +09:00
pgtable.h ARCv2: MMUv4: TLB programming Model changes 2015-06-22 14:06:55 +05:30
processor.h ARC: mm: document system mem map clearly 2015-06-19 18:09:29 +05:30
ptrace.h ARCv2: Support for ARCv2 ISA and HS38x cores 2015-06-22 14:06:55 +05:30
sections.h of/fdt: consolidate built-in dtb section variables 2014-04-30 00:59:13 -05:00
segment.h
serial.h ARC: Dynamically determine BASE_BAUD from DeviceTree 2015-02-02 17:08:37 +05:30
setup.h ARC: RIP @running_on_hw 2014-10-13 14:46:17 +05:30
shmparam.h
smp.h ARC: Allow SMP kernel to build/boot on UP-only infrastructure 2014-09-27 14:49:01 +05:30
spinlock_types.h
spinlock.h
stacktrace.h ARC: Make arc_unwind_core accessible externally 2015-02-27 10:15:00 +05:30
string.h ARC: remove extraneous __KERNEL__ guards 2014-10-13 14:46:20 +05:30
switch_to.h
syscall.h
syscalls.h ARC: remove extraneous __KERNEL__ guards 2014-10-13 14:46:20 +05:30
thread_info.h ARCv2: Support for ARCv2 ISA and HS38x cores 2015-06-22 14:06:55 +05:30
timex.h
tlb-mmu1.h
tlb.h
tlbflush.h ARC: [SMP] TLB flush 2013-11-06 10:41:45 +05:30
uaccess.h ARCv2: Adhere to Zero Delay loop restriction 2015-06-22 14:06:56 +05:30
unaligned.h ARC: rename kconfig option for unaligned emulation 2014-10-13 14:46:15 +05:30
unwind.h