mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-03 01:36:44 +07:00
b643f85814
When5e12a613
and0cd3754a
were introduced, Netgear ReadyNAS 102 .dts file was queued for inclusion and missed the update to have Mbus (and then BootROM) ranges properties declared. It also missed the relocation of Armada 370/XP PCIe DT nodes introduced by14fd8ed0
afterde1af8d4
. This patch fixes that which makes 3.12-rc3 bootable on the NAS. Signed-off-by: Arnaud Ebalard <arno@natisbad.org> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
195 lines
3.7 KiB
Plaintext
195 lines
3.7 KiB
Plaintext
/*
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* Device Tree file for NETGEAR ReadyNAS 102
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*
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* Copyright (C) 2013, Arnaud EBALARD <arno@natisbad.org>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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/dts-v1/;
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#include "armada-370.dtsi"
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/ {
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model = "NETGEAR ReadyNAS 102";
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compatible = "netgear,readynas-102", "marvell,armada370", "marvell,armada-370-xp";
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chosen {
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bootargs = "console=ttyS0,115200 earlyprintk";
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};
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memory {
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device_type = "memory";
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reg = <0x00000000 0x20000000>; /* 512 MB */
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};
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soc {
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ranges = <MBUS_ID(0xf0, 0x01) 0 0xd0000000 0x100000
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MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000>;
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pcie-controller {
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status = "okay";
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/* Connected to Marvell SATA controller */
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pcie@1,0 {
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/* Port 0, Lane 0 */
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status = "okay";
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};
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/* Connected to FL1009 USB 3.0 controller */
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pcie@2,0 {
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/* Port 1, Lane 0 */
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status = "okay";
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};
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};
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internal-regs {
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serial@12000 {
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clock-frequency = <200000000>;
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status = "okay";
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};
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sata@a0000 {
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nr-ports = <2>;
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status = "okay";
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};
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pinctrl {
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power_led_pin: power-led-pin {
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marvell,pins = "mpp57";
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marvell,function = "gpio";
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};
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sata1_led_pin: sata1-led-pin {
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marvell,pins = "mpp15";
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marvell,function = "gpio";
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};
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sata2_led_pin: sata2-led-pin {
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marvell,pins = "mpp14";
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marvell,function = "gpio";
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};
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backup_led_pin: backup-led-pin {
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marvell,pins = "mpp56";
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marvell,function = "gpio";
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};
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poweroff: poweroff {
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marvell,pins = "mpp8";
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marvell,function = "gpio";
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};
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};
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mdio {
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phy0: ethernet-phy@0 {
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reg = <0>;
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};
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};
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ethernet@74000 {
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status = "okay";
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phy = <&phy0>;
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phy-mode = "rgmii-id";
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};
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usb@50000 {
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status = "okay";
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};
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i2c@11000 {
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compatible = "marvell,mv64xxx-i2c";
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clock-frequency = <100000>;
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status = "okay";
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g762: g762@3e {
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compatible = "gmt,g762";
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reg = <0x3e>;
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clocks = <&g762_clk>; /* input clock */
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fan_gear_mode = <0>;
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fan_startv = <1>;
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pwm_polarity = <0>;
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};
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};
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};
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};
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clocks {
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#address-cells = <1>;
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#size-cells = <0>;
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g762_clk: fixedclk {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <8192>;
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};
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};
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gpio_leds {
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compatible = "gpio-leds";
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pinctrl-0 = < &power_led_pin
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&sata1_led_pin
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&sata2_led_pin
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&backup_led_pin >;
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pinctrl-names = "default";
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blue_power_led {
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label = "rn102:blue:pwr";
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gpios = <&gpio1 25 1>; /* GPIO 57 Active Low */
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linux,default-trigger = "heartbeat";
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};
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green_sata1_led {
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label = "rn102:green:sata1";
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gpios = <&gpio0 15 1>; /* GPIO 15 Active Low */
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default-state = "on";
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};
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green_sata2_led {
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label = "rn102:green:sata2";
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gpios = <&gpio0 14 1>; /* GPIO 14 Active Low */
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default-state = "on";
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};
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green_backup_led {
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label = "rn102:green:backup";
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gpios = <&gpio1 24 1>; /* GPIO 56 Active Low */
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default-state = "on";
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};
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};
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gpio_keys {
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compatible = "gpio-keys";
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#address-cells = <1>;
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#size-cells = <0>;
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button@1 {
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label = "Power Button";
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linux,code = <116>; /* KEY_POWER */
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gpios = <&gpio1 30 0>;
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};
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button@2 {
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label = "Reset Button";
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linux,code = <0x198>; /* KEY_RESTART */
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gpios = <&gpio0 6 1>;
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};
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button@3 {
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label = "Backup Button";
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linux,code = <133>; /* KEY_COPY */
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gpios = <&gpio1 26 1>;
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};
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};
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gpio_poweroff {
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compatible = "gpio-poweroff";
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pinctrl-0 = <&poweroff>;
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pinctrl-names = "default";
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gpios = <&gpio0 8 1>;
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};
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};
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