Joshua Aberback d56eaa7cfb drm/amd/display: Add missing shifts and masks for dpp registers on dcn2 ... [Why] The register CM_TEST_DEBUG_DATA is used in dpp1_program_input_csc, which is called from dpp2_cnv_setup, but the shifts and masks for the fields of that register are not initialized for dcn2. This causes all reads of that register to return 0. Signed-off-by: Joshua Aberback <joshua.aberback@amd.com> Reviewed-by: Jaehyun Chung <Jaehyun.Chung@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2019-10-10 19:31:42 -05:00
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drm	drm/amd/display: Add missing shifts and masks for dpp registers on dcn2	2019-10-10 19:31:42 -05:00
host1x
ipu-v3	gpu: ipu-v3: image-convert: only sample into the next tile if necessary	2019-08-19 16:25:30 +02:00
vga
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