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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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9d981ea5d4
Some PCI drivers may need to adjust the pci_bus structure after it has been allocated by the Linux PCI core. The PCI core allows architectures to implement the pcibios_add_bus() and pcibios_remove_bus() for this purpose. This commit therefore extends the hw_pci and pci_sys_data structures of the ARM PCI core to allow PCI drivers to register ->add_bus() and ->remove_bus() in hw_pci, which will get called when a bus is added or removed from the system. This will be used for example by the Marvell PCIe driver to connect a particular PCI bus with its corresponding MSI chip to handle Message Signaled Interrupts. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Reviewed-by: Thierry Reding <thierry.reding@gmail.com> Acked-by: Russell King <rmk+kernel@arm.linux.org.uk> Tested-by: Daniel Price <daniel.price@gmail.com> Tested-by: Thierry Reding <thierry.reding@gmail.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
114 lines
3.0 KiB
C
114 lines
3.0 KiB
C
/*
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* arch/arm/include/asm/mach/pci.h
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*
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* Copyright (C) 2000 Russell King
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __ASM_MACH_PCI_H
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#define __ASM_MACH_PCI_H
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#include <linux/ioport.h>
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struct pci_sys_data;
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struct pci_ops;
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struct pci_bus;
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struct device;
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struct hw_pci {
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#ifdef CONFIG_PCI_DOMAINS
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int domain;
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#endif
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struct pci_ops *ops;
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int nr_controllers;
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void **private_data;
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int (*setup)(int nr, struct pci_sys_data *);
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struct pci_bus *(*scan)(int nr, struct pci_sys_data *);
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void (*preinit)(void);
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void (*postinit)(void);
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u8 (*swizzle)(struct pci_dev *dev, u8 *pin);
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int (*map_irq)(const struct pci_dev *dev, u8 slot, u8 pin);
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resource_size_t (*align_resource)(struct pci_dev *dev,
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const struct resource *res,
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resource_size_t start,
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resource_size_t size,
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resource_size_t align);
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void (*add_bus)(struct pci_bus *bus);
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void (*remove_bus)(struct pci_bus *bus);
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};
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/*
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* Per-controller structure
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*/
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struct pci_sys_data {
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#ifdef CONFIG_PCI_DOMAINS
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int domain;
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#endif
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struct list_head node;
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int busnr; /* primary bus number */
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u64 mem_offset; /* bus->cpu memory mapping offset */
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unsigned long io_offset; /* bus->cpu IO mapping offset */
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struct pci_bus *bus; /* PCI bus */
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struct list_head resources; /* root bus resources (apertures) */
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struct resource io_res;
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char io_res_name[12];
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/* Bridge swizzling */
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u8 (*swizzle)(struct pci_dev *, u8 *);
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/* IRQ mapping */
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int (*map_irq)(const struct pci_dev *, u8, u8);
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/* Resource alignement requirements */
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resource_size_t (*align_resource)(struct pci_dev *dev,
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const struct resource *res,
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resource_size_t start,
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resource_size_t size,
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resource_size_t align);
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void (*add_bus)(struct pci_bus *bus);
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void (*remove_bus)(struct pci_bus *bus);
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void *private_data; /* platform controller private data */
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};
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/*
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* Call this with your hw_pci struct to initialise the PCI system.
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*/
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void pci_common_init_dev(struct device *, struct hw_pci *);
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/*
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* Compatibility wrapper for older platforms that do not care about
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* passing the parent device.
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*/
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static inline void pci_common_init(struct hw_pci *hw)
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{
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pci_common_init_dev(NULL, hw);
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}
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/*
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* Setup early fixed I/O mapping.
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*/
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#if defined(CONFIG_PCI)
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extern void pci_map_io_early(unsigned long pfn);
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#else
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static inline void pci_map_io_early(unsigned long pfn) {}
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#endif
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/*
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* PCI controllers
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*/
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extern struct pci_ops iop3xx_ops;
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extern int iop3xx_pci_setup(int nr, struct pci_sys_data *);
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extern void iop3xx_pci_preinit(void);
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extern void iop3xx_pci_preinit_cond(void);
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extern struct pci_ops dc21285_ops;
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extern int dc21285_setup(int nr, struct pci_sys_data *);
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extern void dc21285_preinit(void);
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extern void dc21285_postinit(void);
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extern struct pci_ops via82c505_ops;
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extern int via82c505_setup(int nr, struct pci_sys_data *);
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extern void via82c505_init(void *sysdata);
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#endif /* __ASM_MACH_PCI_H */
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