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This patch adds support for the GiantPlus GPG48273QS5 4.3" WQVGA TFT LCD panel to the simple-panel driver. This panel is connected via a parallel bus and uses both HSYNC and VSYNC, whose lengths are unfortunately not clearly defined. The datasheet only specifies the front- and backporch length, but the timing diagram suggests that both sync signals should be asserted for exactly one clock cycle. Signed-off-by: Philipp Zabel <philipp.zabel@gmail.com> Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Thierry Reding <treding@nvidia.com> |
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| .. | ||
| drm | ||
| host1x | ||
| ipu-v3 | ||
| vga | ||
| Makefile | ||