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d415fa1b88
Add dra7xx support for selecting the phy mode which is present in control module of dra7xx SoC Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: David S. Miller <davem@davemloft.net>
30 lines
799 B
Plaintext
30 lines
799 B
Plaintext
TI CPSW Phy mode Selection Device Tree Bindings
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-----------------------------------------------
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Required properties:
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- compatible : Should be "ti,am3352-cpsw-phy-sel" for am335x platform and
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"ti,dra7xx-cpsw-phy-sel" for dra7xx platform
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- reg : physical base address and size of the cpsw
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registers map
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- reg-names : names of the register map given in "reg" node
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Optional properties:
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-rmii-clock-ext : If present, the driver will configure the RMII
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interface to external clock usage
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Examples:
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phy_sel: cpsw-phy-sel@44e10650 {
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compatible = "ti,am3352-cpsw-phy-sel";
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reg= <0x44e10650 0x4>;
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reg-names = "gmii-sel";
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};
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(or)
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phy_sel: cpsw-phy-sel@44e10650 {
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compatible = "ti,am3352-cpsw-phy-sel";
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reg= <0x44e10650 0x4>;
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reg-names = "gmii-sel";
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rmii-clock-ext;
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};
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