mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-28 11:18:45 +07:00
926b65e20d
This patch provides bindings for the 64-bit timer in the KeyStone architecture devices. The timer can be configured as a general-purpose 64-bit timer, dual general-purpose 32-bit timers. When configured as dual 32-bit timers, each half can operate in conjunction (chain mode) or independently (unchained mode) of each other. It is global timer is a free running up-counter and can generate interrupt when the counter reaches preset counter values. Documentation: http://www.ti.com/lit/ug/sprugv5a/sprugv5a.pdf Acked-by: Rob Herring <robh@kernel.org> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
30 lines
974 B
Plaintext
30 lines
974 B
Plaintext
* Device tree bindings for Texas instruments Keystone timer
|
|
|
|
This document provides bindings for the 64-bit timer in the KeyStone
|
|
architecture devices. The timer can be configured as a general-purpose 64-bit
|
|
timer, dual general-purpose 32-bit timers. When configured as dual 32-bit
|
|
timers, each half can operate in conjunction (chain mode) or independently
|
|
(unchained mode) of each other.
|
|
|
|
It is global timer is a free running up-counter and can generate interrupt
|
|
when the counter reaches preset counter values.
|
|
|
|
Documentation:
|
|
http://www.ti.com/lit/ug/sprugv5a/sprugv5a.pdf
|
|
|
|
Required properties:
|
|
|
|
- compatible : should be "ti,keystone-timer".
|
|
- reg : specifies base physical address and count of the registers.
|
|
- interrupts : interrupt generated by the timer.
|
|
- clocks : the clock feeding the timer clock.
|
|
|
|
Example:
|
|
|
|
timer@22f0000 {
|
|
compatible = "ti,keystone-timer";
|
|
reg = <0x022f0000 0x80>;
|
|
interrupts = <GIC_SPI 110 IRQ_TYPE_EDGE_RISING>;
|
|
clocks = <&clktimer15>;
|
|
};
|